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ML610471/472/473/Q471/Q472/Q473 User's Manual
Chapter 10 Watchdog Timer
10-7
10.3.1 Handling example when you do not want to use the watch dog timer
WDT counter is a free-run counter that starts count-up automatically after the system reset released and the low-speed
clock (LSCLK) starts oscillating. If the WDT counter gets overflow, the WDT non-maskable interrupt occurs and then a
system reset occurs. Therefore, it is needed to clear the WDT counter even if you do not want to use the WDT as a
fale-safe function.
See following example programming codes to clear the WDT counter in the interrupt routine.
Example programming code:
__DI(); // Disable multi-interrupts
do
{
WDTCON = 0x5a;
} while(WDP != 1)
WDTCON = 0xa5;
__EI();