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ML610471/472/473/Q471/Q472/Q473 User's Manual
Chapter 10 Watchdog Timer
10-6
Figure 10-2 shows an example of watchdog timer operation.
Figure 10-2 Example of Watchdog Timer Operation
①
The WDT counter starts counting after the system reset has been released and the low-speed clock oscillation
start.
②
The overflow period of the WDT counter (T
WOV
) is set to WDTMOD.
③
“5AH” is written to WDTCON. (Internal pointer 0 to 1)
④
“0A5H” is written to WDTCON and the WDT counter is cleared. (Internal pointer 1 to 0)
⑤
“5AH” is written to WDTCON. (Internal pointer 0 to 1)
⑥
When “5AH” is written to WDTCON after the occurrence of abnormality, it cannot be accepted as the internal
pointer is set to “1”. (Internal pointer 1 to 0)
⑦
Although “0A5H” is written to WDTCON, the WDT counter is not cleared since the internal pointer is “0” and
the writing of “5AH” is not accepted in
6
. (Internal pointer 0 to 1)
⑧
The WDT counter overflows and a watchdog timer interrupt request (WDTINT) is generated. In this case, the
WDT counter and the internal pointer (WDP) are initialiaed for a half cycle of low speed clock (about 15.26us).
⑨
If the WDT counter is not cleared even by the software processing performed following a watchdog timer
interrupt and the WDT counter overflows again, WDT reset occurs and the mode is shifted to a system reset
mode.
Note:
•
In STOP mode, the watchdog timer operation also stops.
• In HALT mode, the watchdog timer operation does not stop. When the WDT interrupt occurs, the HALT mode is
released.
• The watchdog timer cannot detect all the abnormal operations. Even if the CPU loses control, the watchdog timer
cannot detect the abnormality in the operation state in which the WDT counter is cleared.
e
5A
f
A5
g
5A
h
5A
Occurrence of
abnormality
i
A5
T
WOV
Overflow period
Overflow
Low-Speed
Clock
Oscillation
Program
Start
5A A5
Data:
RESET_S
System reset
WDTCON Write
WDTP
Internal pointer
WDT counter
WDTINT
WDT interrupt
WDT reset
T
WOV
Overflow period
d
WDTMOD
Setting
WDTMOD
Setting
j
Occurrence of WDTINT
k
Occurrence of WDT reset