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Keysight N5990A-155 DisplayPort User Guide
4
Connection Diagrams
Calibration Overview
Before any receiver test procedure can be run, the DisplayPort receiver
test system must be calibrated.
The ValiFrame calibration plane is given by the DUT input ports. The
receiver test signal characteristics such as the signal generator output
voltage level and jitter parameters are typically affected by the signal
transmission between the generator output ports and the DUT input ports.
Thus, for any signal output parameter that you may select (referred to as
the ‘set value’), the jitter and the signal received at the DUT input ports
(referred to as the ‘actual value’) deviate from the set value. Additional
deviations can be caused by effects such as offset errors, hysteresis, and
nonlinear behavior of the signal generator. The ValiFrame calibration
procedures compensate the actual value deviations of the relevant signal
output parameter from the set values over the required parameter range.
All calibration procedures required for DisplayPort receiver testing are
included in the ValiFrame software. The ValiFrame calibration procedures
are implemented such that the calibration process is conducted as fast as
possible and is automated as much as possible, for example, by minimizing
the number of reconfigurations of the hardware connections.
Calibrations are organized in groups depending on the data rate, the test
point and the lane:
• Measured at TP1 (for all data rates)
• Measured at TP2 CTLE Lane 0 (only for HBR3)
• Measured at TP2 CTLE Lane 1
• Measured at TP2 CTLE Lane 2
• Measured at TP2 CTLE Lane 3
• Measured at TP2 Lane 0 (for RBR, HBR and HBR2)
• Measured at TP2 Lane 1
• Measured at TP2 Lane 2
• Measured at TP2 Lane 3
• Measured at TP3 Lane 0 (for all data rates)
• Measured at TP3 Lane 1
• Measured at TP3 Lane 2
• Measured at TP3 Lane 3
presents a description of the procedure parameters used in the
different calibrations.
Содержание N5990A-155
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