Transmitter Description
PRODUCT INFORMATION
39
STEL-2176
TRANSMITTER
INTRODUCTION
The STEL-2176
1
contains a highly integrated,
maximally flexible, burst transmitter targeted to the
cable modem market. It receives serial data,
randomizes the data, performs FEC and differential
encoding, maps the data to a constellation before
modulation, and outputs an analog RF signal.
The STEL-2176 is the latest in a series of modulator
chips that comprise the STEL-1103 through
STEL-1109 modulators. Several key components (e.g.,
a 64-bit FIR and a clock multiplier) have been
incorporated in the STEL-2176 and the enhancements
have resulted in significant improvements to the
chipÕs performance.
The STEL-2176 is capable of operating at data rates of
up to 10 Mbps in BPSK mode, 20 Mbps in QPSK
mode, and 40 Mbps in 16QAM mode. It operates at
clock frequencies of up to 165 MHz, which allows its
internal, 10-bit Digital-to-Analog Converter (DAC) to
generate RF carrier frequencies of 5 to 65 MHz.
The STEL-2176 also uses digital FIR filtering to
optimally shape the spectrum of the modulating data
prior to modulation. This optimizes the spectrum of
the modulated signal, and minimizes the analog
filtering required after the modulator. The filters are
designed to have a symmetrical (mirror image)
polynomial transfer function, thereby making the
phase response of the filter linear. This also eliminates
the inter-symbol interference that results from group
delay distortion. In this way, it is possible to change
the carrier frequency over a wide frequency range
without having to change filters, thus providing the
ability to operate a single system in many channels.
The STEL-2176 can operate with very short gaps
between transmitted bursts to increase the efficiency
of Time Division Multiple Access (TDMA) systems.
The STEL-2176 operates properly even when the
interburst gap is less than four (4) symbols (half the
length of the FIR filter response). In this case the
1
The STEL-2176 utilizes advanced signal processing
techniques which are covered by U.S. Patent Number
5,412,352.
postcursor of the previous burst overlaps and is
superimposed on the precursor of the following
burst.
Signal level scaling is provided after the FIR filter to
allow the STEL-2176Õs maximum arithmetic dynamic
range to be utilized. Signal levels can be changed over
a wide range depending on how the device is
programmed.
In addition, the STEL-2176 is designed to operate
from a 3.3 Vdc power supply and the chip can be
interfaced with logic that operates at 5 Vdc.
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTIONS
The STEL-2176 is comprised of the Data Path (see
page 39) and Control Unit (see page 52) sections
shown in Figure 24. The Data Path is comprised of a
Bit Sync Block, Bit Encoder Block (i.e.,Êthe Scrambler,
Reed-Solomon Encoder, and two Multiplexers shown
in
Figure 25
), Symbol Mapper Block (i.e., the Bit
Mapper, Differential Encoder, and Symbol Mapper
are shown in Figure 28), two channels (one for I and
one for Q), a Combiner, and a 10-bit DAC. Each
channel consists of a Nyquist Filter, Interpolation
Filter, and Modulator. The Control Unit is comprised
of a Bus Interface Unit (BIU), Clock Generator, and
NCO.
Table 32 summarizes the main features of the circuits
described by the remaining paragraphs of this
section.
DATA PATH DESCRIPTION
Bit SYNC Block
The Bit Sync Block has two functions: latching input
data, and synchronizing the STEL-2176 TXBITCLK
and symbol counters to the user data.
