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GRUNDIG Service
Platinenabbildungen und Schaltpläne / Layout of PCBs and Circuit Diagrams
GDV 100 D
Digitalplatte / Digital Board – MPEG-Decoder
DATA BUS
ADDRESS BUS
CONTROL BUS
FROM DSM /DVP
(SERIAL VIDEO)
RES_LSIN!
YUV_MPEG5!
HS!
VS_MPEG!
YUV_MPEG0!
YUV_MPEG1!
YUV_MPEG2!
YUV_MPEG3!
YUV_MPEG4!
YUV_MPEG6!
V_SCLK!
V_DATA!
V_REQN!
V_VVAL!
DSN2!
A1!
CS_LSIN!
IRQ_LSIN!
RWN!
WAITN!
A2!
A3!
D8!
D9!
D10!
D11!
D12!
D13!
D14!
D15!
YUV_MPEG7!
BD63!
BD62!
BD61!
BD60!
# NOT MOUNTED
P 4-22/R3181,R3184
4
5
1
6
7
8
9
10
11
2
3
L
K
J
O
I
H
G
F
E
D
C
B
A
N
M
4
5
1
6
7
8
9
10
11
2
3
2334
47u
25V
2330
47u
25V
27M_LSI!
+3V3!
3V3LSI!
3V3LSI!
3V3LSI!
3V3LSI!
3V3LSI!
3V3LSI!
3V3LSI!
3V3LSI!
3V3LSI!
3V3LSI!
3V3LSI!
3V3LSI!
3V3LSI!
+3V3!
+5V!
3V3LSI!
3V3LSI!
3V3LSI!
0R
3301
4k7
3311
4k7
3310
7303
125
126
127
42
79
41
121
80
2
141
140
139
138
118
123
132
103
104
105
106
107
108
109
110
124
98
39
136
12
28
47
63
85
113
144
153
51
96
137
1
130
128
119
100
81
131
159
88
89
90
91
92
93
94
95
133
120
117
116
115
102
82
114
87
72
40
160
11
27
46
62
86
112
143
152
20
111
97
135
134
L64005
VIDEO INTERFACE
INTERFACE
AUDIO
WAITN
RESETN
NC1
NC2
NC3
INTRN
NC4
NC5
NC6
RES1
RES2
RES3
RES4
READ
A0
A1
A2
D0
D1
D5
D6
ASN
D7
CSN
D4
D2
D3
CLK_GEN.
MPEG2 IN
VVALID
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
OSD
VS
HS
CREF
BLANK
BCLK
LRCLF
ASDATA
ACLK
BD63
BD62
BD61
BD60
HOST I/F
SYSCLK
AREQN
AVALID
ERRORN
SCLK1
SER1
VREQN
GND4
VDD5
GND5
VDD6
GND6
VDD7
GND7
VDD8
GND8
VDD9
GND9
VDD10
GND10
VDD11
GND11
VDD12
GND12
VDD1
GND1
VDD2
GND2
VDD3
GND3
VDD4
MPEG AVG DECO
INTEGRATED
LSI
5304
BEAD
7300
LM3940-3.3
G
I
O
2311
22n
2310
22n
2309
22n
2308
22n
2307
22n
2306
22n
2305
22n
2304
22n
2303
22n
2302
22n
2301
22n
2329
470n
P 4-27