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E
Configurable Machine State
The KA681/KA691/KA692/KA694 CPU module has many control registers that
need to be configured for proper operation of the module. The following list
shows the normal state of all configurable bits in the CPU module as they are
left after the successful completion of power-up ROM diagnostics.
VAX 4000 Models 500A, 505A, 600A, 700A, 705A
Configuration registers and writable bits: (* = power up reset state)
NCA:
====
CMCDSR:
Mode Control and Diagnostic Status Register
(2102 0004)
--------------------------------------------------------
15:14: CP2 MT Timer Prescaler
11 = 144000 cycles*
- needed for CQBIC 10ms No Grant
timeout
13:12: CP1 MT Timer Prescaler
00 = 144 cycles - minimum for passive releases, no
cycle should take longer than this
11:10: NDAL Timeout Prescaler
00 = 3200 cycles* - this is longer than both NCA and
NMC transactions timeouts, preserves timeout
order
9: QBUS_TRANS enable (formerly CQBIC_PRESENT)
0 =
QBUS_TRANS signal disabled* - this is to avoid
QBUS_TRANS deadlock
8: IO2 ID enable
1 = enabled
7: Force wrong CP2 bus parity
0 = off* - diagnostic use only
6: Force wrong CP1 bus parity
0 = off* - diagnostic use only
5:
Force wrong NDAL master parity
0 = off* - diagnostic use only
4:
Force wrong NDAL slave parity
0 = off* - diagnostic use only
Configurable Machine State E–1