System Troubleshooting and Diagnostics
5.2 Product Fault Management and Symptom-Directed Diagnosis
5.2 Product Fault Management and Symptom-Directed
Diagnosis
This section describes how errors are handled by the microcode and software,
how the errors are logged, and how, through the Symptom-Directed Diagnosis
(SDD) tool, VAXsimPLUS, errors are brought to the attention of the user. This
section also provides the service theory used to interpret error logs to isolate
the FRU. Interpreting error logs to isolate the FRU is the primary method of
diagnosis.
5.2.1 General Exception and Interrupt Handling
This section describes the first step of error notification: the errors are first
handled by the microcode and then are dispatched to the OpenVMS error
handler.
The kernel uses the NVAX core chipset: NVAX CPU, NVAX Memory Controller
(NMC), and NDAL to CDAL adapter (NCA).
Internal errors within the NVAX CPU result in machine check exceptions,
through System Control Block (SCB) vector 004, or soft error interrupts at
Interrupt Priority Level (IPL) 1A, SCB vector 054 hex.
External errors to the NVAX CPU, which are detected by the NMC or NDAL to
CDAL adapter (NCA), usually result in these chips posting an error condition
to the NVAX CPU. The NVAX CPU will then generate a machine check
exception through SCB vector 004, hard error interrupt, IPL 1D, through SCB
vector 060 (hex), or a soft error interrupt through SCB vector 054.
External errors to the NMC and NCA, which are detected by chips on the
CDAL buses for transactions that originated on the NVAX CPU, are typically
signaled back to the NCA adapter. The NCA adapter will post an error
signal back to the NVAX CPU, which generates a machine check or high level
interrupt.
In the case of Direct Memory Access (DMA) transactions where the NCA or
NMC detects the error, the errors are typically signaled back to the CDAL-Bus
device, but not posted to the NVAX CPU. In these cases the CDAL-Bus device
typically posts a device level interrupt to the NVAX CPU via the NCA. In
almost all cases, error state is latched by the NMC and NCA. Although these
errors won’t result in a machine check exception or high level interrupt (i.e.,
results in device level IPL 14–17 versus error level IPL 1A, 1D), the OpenVMS
machine check handler has a polling routine that will search for this state at
one-second intervals. This will result in the host’s logging a polled error entry.
5–4 System Troubleshooting and Diagnostics
