Curtiss-Wright FHF5-PC4MWB04-00, Справочник по аппаратуре

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REGISTERS
Copyright 2017 6-6 FibreXtreme Hardware Reference
Field Description Access Reset
Value
6 SYNC as D0
– If ‘1’ then bit 0 of the data stream is
used as /SYNC in the outgoing and incoming data
stream. If ‘0’, bit 0 is not used as /SYNC.
R/W 0
7 Reserved None 0
8 Disable Receiver
– ‘1’ disables the link interface from
placing data in the Receive FIFO
. When set to ‘1,’ this
signal also prevents the modification of the DIR, NRDY,
and SUSPEND flags in the retransmitted data stream if
Loop (Copy) Mode is enabled. Set to a '0' for normal
operation, where received link data will be placed into
the Receive FIFO. When the receiver is enabled and
Loop (or Copy) Mode is enabled, the status of the
SUSPEND request will be updated as appropriate in
the retransmitted data stream. If Loop (or Copy) mode
is selected (LWR
AP = ‘1’), the values of DIR and
NRDY are used as follows: if the receive interface is
enabled (Disable Receiver = ‘0’), the values transmitted
are the received link values ORed with the host-
interface values; otherwise, the values are
retransmitted according to their received link values.
R/W 0
9 Disable Transmitter
– A ‘1’ disables the link interface
from removing things from the Transmit FIFO
. A ‘0’
in
dicates normal transmit operation. Set this bit to ‘1’
when loop mode is enabled via the LWRAP bit.
R/W 0
10 EWRAP
– This signal controls loopback operation of
the user interface’s data stream. A ‘1’ indicates the
outgoing data stream is electronically wrapped into the
incoming data stream at the serializer/deserializer
. A ‘0’
indicates non-wrapped data flow to and from the link
interface. This is typically used for testing purposes.
R/W 0
11 LWRAP
– This signal controls the loopback operation
of the link interface’s data stream and implements the
Copy Mode described in the VITA 17.1 Serial FPDP
specification. S
et to ‘1’ to enable loop mode, whereby
the incoming data stream is electronic wrapped into the
outgoing data stream internally to the FPGA. Set to a
‘0’ for normal operation utilizing a point-to-point
topology. The configuration of the nodes is intended to
be static.
NOTE : When changing loop topologies, the resulting
change in the way link data is used may cause bad
data or error conditions on the receiving nodes. It will
be necessary to deploy a mechanism in the system to
cleanup these conditions after reconfiguration.
R/W 0
12 Copy Master Mode - Set to '1' on the loop initiator
device in any topology with more than two cards (e.g.
loop or chained). The loop initiator will then place four
IDLE ordered sets or three IDLE ordered sets plus a
SWDV ordered set per fiber frame. When '0', the loop
initiator will place one IDLE ordered set or one SWDV
ordered set per fiber frame. All receivers in the loop or R/W 0