3
Changing the Configuration Register Settings
OL-5598-01
About the Configuration Register
describes the boot field, which is the lowest four bits of the configuration register (bits 3, 2, 1,
and 0). The boot field setting determines whether the router loads an operating system and where the
router obtains the system image.
shows how each setting combination of bits 10 and 14 affects the IP broadcast address.
shows the console line speed for each setting combination of bits 5, 11, and 12.
14
0x4000
Controls the network and subnet portions of the IP broadcast address:
•
Setting bit 10 causes the processor to use all zeros.
•
(Factory default) Clearing bit 10 causes the processor to use all ones.
Bit 14 interacts with bit 10, which controls the host portion of the IP
broadcast address. See
for the combined effect of bits 10 and 14.
15
0x8000
Enables diagnostic messages and ignores the contents of NVRAM.
Table 1
Configuration Register Bit Descriptions (continued)
Bit
Number
Hexadecimal
Meaning
Table 2
Boot Field Configuration Register Bit Descriptions
Boot Field
(Bits 3, 2, 1, and 0)
Meaning
0000
(0x0)
At the next power cycle or reload, the router boots to the ROM monitor (bootstrap
program). To use the ROM monitor, you must use a terminal or PC that is
connected to the router console port. For information about connecting the router
to a PC or terminal, see the hardware installation guide for your router.
In ROM monitor mode, you must manually boot the system image or any other
image by using the
boot
ROM monitor command. See the section “Booting an
Image (boot)” in
0001
(0x01)
Boots the first image in flash memory as a system image.
0010 - 1111
(0x02 - 0xF)
At the next power cycle or reload, the router sequentially processes each
boot
system
command in global configuration mode that is stored in the configuration
file until the system boots successfully.
If no
boot system
commands are stored in the configuration file, or if executing
those commands is unsuccessful, then the router attempts to boot the first image
file in flash memory.
Table 3
Broadcast Address Configuration Register Bit Combinations
Bit 10
Bit 14
Broadcast Address (<net> <host>)
0
0
<ones> <ones>
1
0
<ones> <zeros>
1
1
<zeros> <zeros>
0
1
<zeros> <ones>
Содержание 2800 Series
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