
IIOIS12 HARDWARE
MULTIBUS CHASSIS HARDWARE
I-E96-107-2N
4 - 9
Figure 4-7. IIMCP01 Multibus Communication Processor Module
IIMCP01/01A
U24
U23
LEDS
STOP
RESET
SW4
DO 1+
DO 1-
DO 2+
DO 2-
P4
P5
J5
J6
SW0
SW1
SW2
P6
OPEN
MSB
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
LSB
OPEN
OPEN
POR
T
A
POR
T
B
PIN 1
CABLE
663451226N2
TO IIMLM01
TO SERIAL CARD PORT NO. 1 IN PC,
OR TO COM2 IN PCs > 200 Mhz;
CABLE L700579V19-04
DIAGNOSTIC
PORT
SW3
GS940108A
I.D. NUMBER: IIMCP01/01A
Table 4-6. Multibus Communication Processor
Configuration - Switch 0
Poles
Function
Description
1
ROM checksumming
*
0 = ROM checksum enabled
1 = ROM checksum disabled
2-3
Port A characteristics
00 = 8 data, 1 stop, no parity
* 10 = 8 data, 1 stop, odd parity
01 = 8 data, 1 stop, even parity
11 = 8 data, 2 stop, no parity
4
Port B operation mode
0 = NIU command mode
*
1 = NIU utility mode
5-6
Port B data characteristics
(Only if switch 4 = 0,
otherwise defaults to 00)
* 00 = 8 data, 1 stop, no parity
10 = 8 data, 1 stop, odd parity
01 = 8 data, 1 stop, even parity
11 = 8 data, 2 stop, no parity
7
Command
checksumming
0 = command checksum disabled
*
1 = command checksum enabled
8
Unused
NOTES:
* = Normal setting.
Closed = 0 = on = up.
Open = 1 = off = down.
N/U = Not used.