Atop EH9711 Series, Руководство пользователя

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Industrial Managed
Ethernet Switch – EH9711
User Manual
Page 106 of 223
Label Description Factory
Default
Force Free Run: Clock Selector is forced to Free Run State.
Source Only relevant if Manual mode is selected (see above). 1
WTR Time
WTR is the Wait-To-Restore timer value in minutes. The WTR time is activated on the
falling edge of a clock source failure (in Revertive mode). This means that the clock
source is first available for clock selection after WTR Time (can be cleared).
5M
SSM Hold Over
This is the transmitted SSM QL value when clock selector is in Hold Over State. Default
SSM Free Run
This is the transmitted SSM QL value when clock selector is in Free Run State. Default
EEC Option
The ZL30xxx based SyncE modules support both EEC1 and EEC2 option. The
difference is: EEC1=> DPLL bandwidth=3,5 Hz, EEC2=> DPLL bandwidth = 0,1 Hz.
1
State
This is indicating the state of the clock selector. Possible states are:
Free Run: There is no external clock sources to lock to (unlocked state). The Clock
Selector has never been locked to a clock source long enough to calculate the hold
over frequency offset to local oscillator. The frequency of this node is the frequency of
the local oscillator.
Hold Over: There is no external clock sources to lock to (unlocked state). The Clock
Selector has to calculate the holdover frequency offset to local oscillator. The
frequency of this node is hold to the frequency of the clock source previous locked to.
Locked: Clock selector is locked to the clock source indicated (See next).
Top: Clock selector is locked to Time over packets, e.g., PTP (See next).
Free Run
Clock Source The clock source locked to when clock selector is in locked state. -
LOL Clock selector has raised the Los Of Lock alarm. -
DHOLD
Clock selector has not yet calculated the holdover frequency offset to local oscillator.
This becomes active for about 10 s. when a new clock source is selected -
The SyncE module may have a station clock input and/or a station clock output. This can be configured under the
Station
Clock Configuration part.
Table 2.72 Description of Station Clock Configuration under SyncE
Label Description Factory
Default
Clock input frequency
If supported by the SyncE HW, the station clock input frequency can be
configured, the possible frequencies are:
1,544 MHz, 2,048 MHz or 10 MHz
Disabled
Clock output frequency
If supported by the SyncE HW, the station clock output frequency can be
configured, the possible frequencies are:
1,544 MHz, 2,048 MHz or 10 MHz
Disabled
Table 2.73 Description of SyncE Ports under SyncE
Label Description Factory
Default
Port The port number to configure. -
SSM Enable Enable and disable of SSM functionality on this port. Unclicked
Tx SSM
Monitoring of the transmitted SSM QL on this port. Transmitted QL should be the
Quality Level of the clock generated by this node. This means the QL of the clock source
this node is locked to. -
Rx SSM
Monitoring of the received SSM QL on this port. If link is down on port, QL_LINK is
indicated. If no SSM is received, QL_FAIL is indicated.
-
1000BaseT
Mode
If PHY is in 1000BaseT Mode then this is monitoring the master/slave mode. In order to
receive clock on a port, it has to be in slave mode. In order to transmit clock on a port, it
has to be in master mode. Master
Table 2.74 Description of PTP Ports under SyncE
Label Description
Instance The instance number of switch PTP feature