American Megatrends 39 Series, Руководство пользователя

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Chapter 4 - AMI BIOS Features
70
Advanced Chip Set Setup Options, Continued
O n B o a r d P a r a l l e l P o r t O n B o a r d P a r a l l e l P o r t
This option enables or disables the onboard parallel port. The settings
are I/O port address 378h - 37Fh, I/O port address 278h - 27Fh, or
Disabled. P3 is the onboard parallel port.
If the configuration data in CMOS RAM is corrupted when the system
is powered on, the system BIOS automatically configures the onboard
parallel port according to the presence or absence of parallel ports on
any adapter cards in the system expansion slots (off board parallel
ports). Autoconfiguration only occurs when CMOS RAM data is
corrupted. For the parallel port:
If the Offboard
Parallel Port is
the Onboard Parallel Port is Autoconfigured as
None or 3BCh 378h Can be disabled or changed to 278h via
BIOS Advanced Chip Set Setup.
378h 278h Can be disabled via BIOS Advanced Chip
Set Setup. If changed to 378h, an I/O
port address conflict occurs.
278h 378h Can be disabled via BIOS Advanced Chip
Set Setup. If changed to 278h, an I/O
port address conflict occurs.
378h, 278h Disabled If changed to 378h or 278h, an I/O port
address conflict occurs.
P3 is the parallel port on the Baby Voyager motherboard. If disabled
via Setup, do not attach any device to P3. J18 is used to configure the
interrupt request line (IRQ) for the onboard parallel Port. If the
onboard parallel port is disabled, remove the jumper block from J18 to
disable the onboard parallel port interrupt. The J18 settings are:
Jumper Pins Shorted
Description
J18 Pins 1-2 IRQ5 selected for the onboard parallel
port.
J18 Pins 2-3 IRQ7 selected for the onboard parallel
port (Default).