Chapter 4 Remote Interface Reference
The SCPI Status Registers
95
4
The Status Byte Summary register is cleared when:
• You execute the
*CLS
(clear status) command.
• Querying the Standard Event register (
*ESR?
command) will clear only
bit 5 in the Status Byte summary register.
For example, 24 (8 + 16) is returned when you have queried the status of the
Status Byte register, QUES and MAV conditions have occurred.
The Status Byte Enable register (Request Service) is cleared when:
• You execute the
*SRE
0
command.
• You turn on the power and have previously configured the power supply
using the
*PSC
1
command.
• The enable register
will not
be cleared at power-on if you have previously
configured the power supply using
*PSC
0
.
For example, you must send the
*SRE
96
(32 + 64) to enable ESB and RQS
bits.
Using Service Request (SRQ) and Serial POLL
You must configure your bus controller to respond to the IEEE-488 service
request (SRQ) interrupt to use this capability. Use the Status Byte enable
register (
*SRE
command) to select which summary bits will set the
low-level IEEE-488 service request signal. When bit 6 (request service) is set
in the Status Byte, an IEEE-488 service request interrupt message is
automatically sent to the bus controller. The bus controller may then poll
the instruments on the bus to identify which one requested service (the
instrument with bit 6 set in its Status Byte).
The request service bit is cleared only by reading the Status Byte using an
IEEE-488 serial poll or by reading the event register whose summary bit
is causing the service request.
To read the Status Byte summary register, send the IEEE-488 serial poll
message. Querying the summary register will return a decimal value which
corresponds to the binary-weighted sum of the bits set in the register. Serial
poll will automatically clear the “request service” bit in the Status Byte
summary register. No other bits are affected. Performing a serial poll will
not affect instrument throughput.
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