Agilent Technologies DSO80204B, Руководство по обслуживанию

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Chapter 8: Theory of Operation
Block-Level Theory
152
Figure 8-2
Acquisition Block Diagram
Atte
n
u
a
to
r
Pr
e
A
m
p
&
D
u
al
Tr
ig
g
e
r
C
o
m
p
ar
at
o
rs
Fr
on
t E
n
d
Upper
Lower
INTERFACE
CARD
PCI
Bridge
FPGA
Primary PCI Bus
Ribbon
Cable
Calibrat
or,
Probe
Comp
& Trig
Out
DACS
High Speed Trigger Circuitry
Data
Delay
Circuit
Clock
Delay
Circuit
M
ix
ed S
ign
al
Tr
ig
g
e
r
Scope Back Panel
10
M
H
z
In
Scope Front Panel
P
robe
Com
p
CH 1 CH 2 CH 3 CH 4
CH 1
CH 2
CH 3
CH 4
ATrig
Hold Off
Data
Clock
Data
Deceleration &
Processing
LSI Logic ASIC
Acquisition
Memory
64 Mbit RAM
8 Bit
CLK
CLK
32 Bit
PHI4
32 Bit
PHI3
32 Bit
PHI2
32 Bit
PHI1
Addr
8 Bit
20 GSa ADC
Trig 1
Reference Clock
Generation
Interpolator
Sys
Trig
Secondary PCI Bus
54856b01
Comp.
AUX
I
N
AUX
O
U
T
10
M
H
z
Ou
t
TTL
O
U
T