Agilent Technologies 33120A, Руководство пользователя

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The Status Byte Register
The Status Byte summary register reports conditions from the other
status registers. Query data that is waiting in the function generator’s
output buffer is immediately reported through the “message available”
bit (bit 4). Bits in the summary register are
not latched . Clearing an
event register will clear the corresponding bits in the Status Byte
summary register. Reading all messages in the output buffer, including
any pending queries, will clear the message available bit.
Bit Definitions – Status Byte Register
The Status Byte Summary Register is cleared when
:
œ
You execute the
*CLS
(clear status) command.
œ
Querying the Standard Event register (
*ESR?
command) will clear
only bit 4 in the Summary Register.
The Status Byte Enable Register (request service) is cleared when :
œ
You execute the
*SRE 0
command.
œ
You turn on the power and have previously configured the function
generator using the
*PSC 1
command.
œ
The enable register will not be cleared at power-on if you have
previously configured the function generator using
*PSC 0.
Bit
0 Not Used
1 Not Used
2 Not Used
3 Not Used
4 Message Available
5 Standard Event
6 Request Service
7 Not Used
Decimal
Value
1
2
4
8
16
32
64
128
Definition
Always set to 0.
Always set to 0.
Always set to 0.
Always set to 0.
Data is available in the output buffer.
One or more bits are set in the Standard Event
register (bits must be “enabled” in enable register).
Requesting service (serial poll).
Always set to 0.
4
Chapter 4 Remote Interface Reference
The SCPI Status Registers
203