SERIES APZU+ ACROPACK
USER’S MANUAL
Acromag, Inc. Tel: 248-295-0310 -
19
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www.acromag.com
Global Interrupt Register (Read/Write) - (BAR1 + 0x0000 0000)
This read/write register is used to: globally enable board interrupts and
determine the pending status of interrupts.
An enabled Event Sense bit and the board interrupt enabled when both
enabled will allow interrupts to be generated.
The function of each of the interrupt register bits are described in Table 3.6.
This register can be read or written with either 8-bit, 16-bit, or 32-bit data
transfers. A power-up or system reset sets all interrupt register bits to 0.
Table 3.4 Interrupt Register
Note that any registers/bits not
mentioned will remain at the
default value logic low.
Bit(s) FUNCTION
0
Board Interrupt Enable Bit. This bit must be set to logic “1” to
enable generation of interrupts from the AP module. Setting
this bit to logic “0” will disable board interrupts. (Read/Write
Bit)
0 Disabled
1 Enabled
1
Interrupt Pending Status Bit. This bit can be read to
determine the interrupt pending status of the AP module.
When this bit is logic “1” an interrupt is pending and will cause
an interrupt request if bit-0 of the register is set. When this
bit is logic “0” an interrupt is not being requested.
The Interrupt Status Register should be used to identify the
source of the interrupting channel. This is a read only bit.
Write to this bit will not cause the bit to change. Only clearing
the pending interrupts will clear this bit.
0
No Interrupt
1
Interrupt Pending
31 to 2 Not Used
Module Location In System Register (Read Only) - (BAR1 + 0x0000 0004)
This read only register is used identify the module’s plugin location in a
system.
Table 3.5 Location Register
Note that any registers/bits not
mentioned will remain at the
default value logic low.
Bit(s) FUNCTION
2 to 0
Module Site Location Bits. These bits identify the location on
the carrier of the AP module.
000
Carrier Site A
001
Carrier Site B
010
Carrier Site C
011
Carrier Site D
