SERIES APZU+ ACROPACK
USER’S MANUAL
Acromag, Inc. Tel: 248-295-0310 -
24
-
www.acromag.com
The 10-bits digitized and output from the ADC can be converted to voltage
by using the following equation.
𝑆𝑢𝑝𝑝𝑙𝑦𝑉𝑜𝑙𝑡𝑎𝑔𝑒
(
𝑣𝑜𝑙𝑡𝑠
) =
𝐴𝐷𝐶𝑐𝑜𝑑𝑒
1024
× 3
𝑉
Additional information regarding the system monitor can be found in the
Xilinx System Management Wizard v1.3 product guide PG185 and the
SYSMON user guide UG580.
Table 3.6: SYSMONE4 (System Monitor) (Read Only) - Memory Map
All Data is 10-bit Most
Significant Bit justified.
Data bits 15 to 6 of these
registers hold the valid data.
Address Status
Register
0x0000_2400
Temperature
0x0000_2404 V
CCINT
0x0000_2408 V
CCAUX
0x0000_2480 Maximum
Temperature
0x0000_2484 Maximum
VCCINT
0x0000_2488 Maximum
VCCAUX
0x0000_2490 Minimum
Temperature
0x0000_2494 Minimum
VCCINT
0x0000_2498 Minimum
VCCAUX
Table 3.7: FPGA Voltage and Temperature Range
Symbol Minimum
Typical
Maximum
Vccint
0.95
1.0
1.05
Vccaux
1.71 1.8 1.89
Recommended
Operating
Temperature Range
-40C 50-60C
100C
1
Note 1
: Absolute maximum junction temperature
125
o
C.
Block RAM
The Block RAM is a read/write 16k byte memory space. This memory space
starts a 0x0000_4000 and goes to 0x0000_7FFF. This memory space can be
read or written via 32-bit, 16-bit or 8-bit data transfers
The Effect of Reset
A power-up or bus-initiated software reset will place the module in the input
only, and no interrupts. Further, all event inputs are reset, set to positive
events, and disabled following reset. A false input signal is ensured for
inputs left floating (i.e. reads as 0). The Interrupt Enable bit is cleared with a
software reset.
