Abov MC97F60128, Руководство пользователя

Страница: 16 / 382

16
MC97F60128 ABOV Semiconductor Co., Ltd.
MC97F66128LB14
(64LQFP-1414)
1
2
1
7
1
8
8
9
10
11
3
4
5
6
7
1
9
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
48
47
41
40
39
38
46
45
44
43
42
6
4
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
12
13
14
15
16
2
8
2
9
3
0
3
1
3
2
37
36
35
34
33
5
3
5
2
5
1
5
0
4
9
P
1
5
/S
E
G
6
3
/E
IN
T
9
/E
C
6
/D
S
D
A
P
1
4
/S
E
G
6
2
/E
IN
T
8
/E
C
5
/D
S
C
L
P
5
0
/S
E
G
1
8
/R
X
D
4
P
5
1
/S
E
G
1
9
/T
X
D
4
P00/AN0/EINT0/BLNK
P01/AN1/EINT1
P04/AN4/EINT4
P05/AN5/EINT5
P02/AN2/EINT2
P03/AN3/EINT3
P07/AN7/EINT7
AVREF
P90/AN12/EINTA
P17/XOUT
P16/XIN
VSS1
VDD1
RUNFLAG
RESETB
P06/AN6/EINT6
P
A
1
/S
E
G
5
4
/E
IN
T
G
P
A
0
/S
E
G
5
3
/E
IN
T
F
P
2
7
/C
O
M
7
/S
E
G
5
2
/E
C
4
/E
X
T
S
P
1
P
2
6
/C
O
M
6
/S
E
G
5
1
/E
C
3
/E
X
T
S
P
0
P
2
5
/C
O
M
5
/S
E
G
5
0
/T
R
IG
P
2
4
/C
O
M
4
/S
E
G
4
9
/P
W
M
O
U
T
P
1
1
/S
E
G
5
9
/E
IN
T
1
4
/T
4
O
/P
W
M
4
O
P
1
0
/S
E
G
5
8
/E
IN
T
1
3
/T
3
O
/P
W
M
3
O
/E
X
T
S
P
2
P
1
3
/S
E
G
6
1
/E
IN
T
1
6
/T
6
O
/P
W
M
6
O
P
1
2
/S
E
G
6
0
/E
IN
T
1
5
/T
5
O
/P
W
M
5
O
P
3
5
/S
E
G
4
2
/S
C
K
2
P
3
4
/S
E
G
4
1
/M
O
S
I2
P
3
3
/S
E
G
4
0
/M
IS
O
2
/L
D
A
C
B
2
P
3
2
/S
E
G
3
9
/R
X
D
0
/S
C
L
0
/M
IS
O
0
P40/SEG29/EC0
P52/SEG20/RXD3
P54/SEG22/SS1
P53/SEG21/TXD3
P56/SEG24/TXD1/SDA1/MOSI1
P55/SEG23/SCK1
P41/SEG30/EC1
P46/SEG35/BUZO
P45/SEG34/EINT12/T2O/PWM2O
P42/SEG31/EC2
P44/SEG33/EINT11/T1O/PWM1O
P43/SEG32/EINT10/T0O/PWM0O
P31/SEG38/TXD0/SDA0/MOSI0
P30/SEG37/SCK0
P47/SEG36/SS0
P57/SEG25/RXD1/SCL1/MISO1
P
6
2
/A
N
8
/E
IN
T
1
7
/T
7
O
P
6
4
/A
N
1
0
/T
X
D
2
P
6
3
/A
N
9
/E
C
7
/D
A
C
P
6
1
/E
IN
T
1
8
/T
8
O
/P
W
M
8
A
A
P
6
0
/S
E
G
0
/P
W
M
8
A
B
P
7
4
/C
O
M
3
P
7
3
/S
E
G
4
/V
L
C
0
/P
W
M
8
C
B
P
7
2
/S
E
G
3
/V
L
C
1
/P
W
M
8
C
A
P
7
1
/S
E
G
2
/V
L
C
2
/P
W
M
8
B
B
P
7
0
/S
E
G
1
/V
L
C
3
/P
W
M
8
B
A
P
6
5
/A
N
1
1
/R
X
D
2
P
7
7
/C
O
M
0
P
7
5
/C
O
M
2
P
7
6
/C
O
M
1
NOTE)
1. On On-Chip Debugging, ISP uses P1[5:4] pin as DSDA, DSCL.
2. The P20-P23, P36-P37, P8, P91-P94, PA2-PA4, PB and PD pins should be selected as a
push-pull output or an input with pull-up resistor by software control when the 64-pin
package is used.
3. The AVSS, SXIN, SXOUT, VREG and LPF pins are not in the 64-Pin package.
4. The pin in parentheses can be configured by software control.
Figure 3.4 MC97F66128LB14 64LQFP pin assignment