Abov MC97F2664, Руководство пользователя

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MC97F2664
62 April 11, 2014 Ver. 1.4
Table 8-3 SFR Map (Continued)
Address Function Symbol R/W
@Reset
7 6 5 4 3 2 1 0
E0H Accumulator Register ACC R/W 0 0 0 0 0 0 0 0
E1H P1 Debounce Enable Register P1DB R/W 0 0 0 0 0 0 0 0
E2H Timer 7 Control Low Register T7CRL R/W 0 0 0
– – 0 0 0
E3H Timer 7 Control High Register T7CRH R/W 0 0 0 0
– – – 0
E4H Timer 7 A Data Low Register T7ADRL R/W 1 1 1 1 1 1 1 1
E5H Timer 7 A Data High Register T7ADRH R/W 1 1 1 1 1 1 1 1
E6H Timer 7 B Data Low Register T7BDRL R/W 1 1 1 1 1 1 1 1
E7H Timer 7 B Data High Register T7BDRH R/W 1 1 1 1 1 1 1 1
E8H Reset Flag Register RSTFR R/W 1 x 0 0 x
– – –
E9H P2 Debounce Enable Register P2DB R/W 0 0 0 0 0 0 0 0
EAH Timer 8 Control Low Register T8CRL R/W 0 0 0
– – 0 0 0
EBH Timer 8 Control High Register T8CRH R/W 0 0 0 0
– – – 0
ECH Timer 8 A Data Low Register T8ADRL R/W 1 1 1 1 1 1 1 1
EDH Timer 8 A Data High Register T8ADRH R/W 1 1 1 1 1 1 1 1
EEH Timer 8 B Data Low Register T8BDRL R/W 1 1 1 1 1 1 1 1
EFH Timer 8 B Data High Register T8BDRH R/W 1 1 1 1 1 1 1 1
F0H B Register B R/W 0 0 0 0 0 0 0 0
F1H P35 Debounce Enable Register P35DB R/W
–
0 0 0 0 0 0 0
F2H BUZZER Control Register BUZCR R/W
– – – – 0 0 0 0
F3H BUZZER Data Register BUZDR R/W 1 1 1 1 1 1 1 1
F4H Stack Pointer Watch Low Register SPWRL R/W 1 1 1 1 1 1 1 1
F5H Stack Pointer Watch High Register SPWRH R/W 0 0 0 0 1 1 1 1
F6H Extended Stack Pointer Control Register XSPCR R/W
– – – – – – – 0
F7H System Interrupt Control Register SINTCR R/W
– – – 0 – – – 0
F8H External RAM Bank Selection Register XBANK R/W 0 0 0 0 0 0 0 0
F9H Reserved
– – – – – – – – – –
FAH Flash Sector Address High Register FSADRH R/W
– – – – 0 0 0 0
FBH Flash Sector Address Middle Register FSADRM R/W 0 0 0 0 0 0 0 0
FCH Flash Sector Address Low Register FSADRL R/W 0 0 0 0 0 0 0 0
FDH Flash Identification Register FIDR R/W 0 0 0 0 0 0 0 0
FEH Flash Mode Control Register FMCR R/W 0
– – – – 0 0 0
FFH Mode Entry Register MODINR R
– – – – – – 0 0