ABB REG650 ANSI, Техническое руководство

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The start signal starts a definite time delay. If the value of the start signal is logical
TRUE for longer than the set time delay, the undervoltage step sets its trip signal to
logical TRUE.
This undervoltage functionality together with additional ACT logic can be used to
provide functionality for overcurrent protection with undervoltage seal-in.
8.10.8 Technical data
Table 153: VRPVOC technical data
Function Range or value Accuracy
Start overcurrent (2 - 5000)% of IBase ± 1.0% of I
r
at I<I
r
± 1.0% of I at I>I
r
Definite time delay (0.00 - 6000.00) s ± 0.5% ± 25 ms
Inverse
characteristics, see
table 574 , table 575
and table 576
13 curve types ANSI/IEEE C37.112
IEC 60255–151
±
3% or
±
40 ms
0.10 ≤ k ≤ 3.00
1.5 x I
set
≤ I ≤ 20 x I
set
Operate time start
overcurrent
30 ms typically at 0 to 2 x I
set
20 ms typically at 0 to 10 x I
set
-
Reset time start
overcurrent
40 ms typically at 2 to 0 x I
set
-
Start undervoltage (2.0 - 100.0)% of UBase ± 0.5% of U
r
Operate time start
undervoltage
30 ms typically 2 to 0 x U
set
-
Reset time start
undervoltage
40 ms typically at 0 to 2 x U
set
-
High voltage limit,
voltage dependent
operation
(30 - 100)% of UBase ± 1.0% of U
r
Reset ratio,
overcurrent
> 95% -
Reset ratio,
undervoltage
< 105% -
Overcurrent:
Critical impulse time
Impulse margin time
10 ms typically at 0 to 2 x I
set
15 ms typically
-
1MRK 502 048-UEN A
Section 8
Current protection
255
Technical manual