Chapter 8. Serial Controller
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Interrupt Selection
The interrupt mapping for the PC standard architecture and the ZT 8905 is shown below. Different
interrupt levels for COM1 and COM2 interrupts are selectable through screen 2 of the BIOS SETUP
utility. For more on the BIOS SETUP utility, see the section "BIOS SETUP Overview" in Appendix A.
Serial Channel
PC Interrupt
ZT 8905 Interrupt
COM1
IR4
IR4 or disabled for off-board COM support
COM2
IR3
IR3 or disabled for off-board COM support
Handshake Signals
The PC architecture includes Transmit Data (TXD), Receive Data (RXD), Request To Send (RTS),
Clear To Send (CTS), Data Set Ready (DSR), Data Terminal Ready (DTR), Ring Indicator (RI), and
Data Carrier Detect (DCD).
Serial Channel Interface
The serial ports are configured as DTE and are available through the 100-pin Multi-I/O connector (J5)
The optional ZT 90205 cable converts the serial port interface to standard 9-pin D-shell connectors.
The J5 connector pin assignments are accessible through the "J5 Multi-I/O Connector" topic in
Appendix B.
PROGRAMMABLE REGISTERS
There are six registers for initializing and controlling each serial channel. The "Serial Controller
Register Addressing" table below shows the I/O port addressing for the COM port registers. The
topics that follow illustrate the 16-bit divisor latch, baud rate divisors, and the six programmable
registers for each serial channel.
Serial Controller Register Addressing
COM 1 Address
COM 2 Address
Register
Operation
03F8h (DIV=0)
02F8h (DIV=0)
Receive Buffer
Read
03F8h (DIV=0)
02F8h (DIV=0)
Transmit Buffer
Write
03F8h (DIV=1)
02F8h (DIV=1)
Divisor Latch LSB
Read/Write
03F9h (DIV=0)
02F9h (DIV=0)
Interrupt Control
Read/Write
03F9h (DIV=1)
02F9h (DIV=1)
Divisor Latch MSB
Read/Write
03FAh
02FAh
Interrupt Status
Read
03FBh
02FBh
Line Control
Read/Write
03FCh
02FCh
Modem Control
Read/Write
03FDh
02FDh
Line Status
Read
03FEh
02FEh
Modem Status
Read
03FFh
02FFh
Reserved
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