Ziatech Corporation ZT 8905, Hardware Manual

Page: 66 / 166

Chapter 6. DMA Controller
49
Slave DMA I/O Port Addressing
Address
Slave Master Register Operation
0 C0 Channel 0 Base/Current Address Write
Channel 0 Current Address Read
1 C2 Channel 0 Base/Current Count Write
Channel 0 Current Count Read
2 C4 Channel 1 Base/Current Address Write
Channel 1 Current Address Read
3 C6 Channel 1 Base/Current Count Write
Channel 1 Current Count Read
4 C8 Channel 2 Base/Current Address Write
Channel 2 Current Address Read
5 CA Channel 2 Base/Current Count Write
Channel 2 Current Count Read
6 CC Channel 3 Base/Current Address Write
Channel 3 Current Address Read
7 CE Channel 3 Base/Current Count Write
Channel 3 Current Count Read
8 D0 Status Read
Command Write
9 D2 Write Request Write
A D4 Write Single Mask Write
B D6 Write Mode Write
C D8 Clear Byte Pointer Write
D DA Clear Master Write
E DC Clear Mask Write
F DE Write Mask Write
DMA Page I/O Port Addressing
Address Register Operation
87h Channel 0 A16-23 Address Read/Write
83h Channel 1 A16-23 Address Read/Write
81h Channel 2 A16-23 Address Read/Write
81h Channel 2 A16-23 Address Read/Write
82h Channel 3 A16-23 Address Read/Write
8Bh Channel 5 A16-23 Address Read/Write
89h Channel 6 A16-23 Address Read/Write
8Ah Channel 7 A16-23 Address Read/Write
DMA Extended Page (A24-31) I/O Port Addressing
Address Register Operation
487h Channel 0 A24-31 Address Read/Write
483h Channel 1 A24-31 Address Read/Write
481h Channel 2 A24-31 Address Read/Write
481h Channel 3 A24-31 Address Read/Write
48Bh Channel 5 A24-31 Address Read/Write
489h Channel 6 A24-31 Address Read/Write
48Ah Channel 7 A24-31 Address Read/Write
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