Chapter 5. Counter/Timers
45
Multiple Latch Control Register
7
6
5
4
3
2
1
0
Register: Multiple Latch Control
Address: 40h
Counter Selection
0
Access: Write
CTL
001 Counter 0
1
CT1
010 Counter 1
Status Latch
0 Enabled
1 Disabled
Control Latch
0 Enabled
1 Disabled
1
STL
CT2
CT0
100 Counter 2
Multiple Latch Control Register
ADDITIONAL INFORMATION
Refer to the
Ziatech Industrial Computer System Manual
for more information on the operating
system's use of the counter/timers. Refer to the Intel
Peripheral Components, 1995
data book for
more information on the 8254 counter/timer operating modes.
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