Chapter 6. DMA Controller
54
Clear Byte Register
Register: Clear Byte
Slave Address: C
Master Address: D8
0
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
Access: Write
Clear Byte Register
Clear Master Register
Register: Clear Master
Slave Address: D
Master Address: DA
0
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
Access: Write
Clear Master Register
Clear Mask Register
Register: Clear Mask
Slave Address: E
Master Address: DC
0
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
Access: Write
Clear Mask Register
Write Mask Register
MC1
7
6
5
4
3
2
1
0
Register: Write Mask
Slave Address: F
Channel 0 Mask
Master Address: DE
0 Reset
0
MC3
1 Set
Channel 2 Mask
0 Reset
1 Set
Channel 3 Mask
0
MC2
Channel 1 Mask
0 Reset
1 Set
0 Reset
0
0
MC0
Access: Write
1 Set
Write Mask Register
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