1-1
SM 701730-01E
1
Principles of Operation
1.1
Block Diagram
Block Diagram of the DL1720E/DL1740E/DL1740EL
CH1
External clock input
External trigger input
Trigger gate input
ATT
Pre-
AMP
Multiplexer
A/D
Primary
data
processing
circuit
Acquisition
memory
Data
processing
memory
Color LCD
display
Secondary
data
processing
circuit
Trigger
circuit
Time base
Trigger output
Keyboard
GP-IB
FDD or
PC card
(Optional)
CH2
CH3*
CH4*
Primary
memory
Display
memory
Display
processing
circuit
Built-in
printer
USB
Peripheral
GO/NO-GO
(Optional)
Ethernet
VGA video
output
CPU
USB
Signal Flow
The signal applied to each signal input terminal is first passed to the vertical control
circuit consisting of an attenuator (ATT) and pre-amplifier. At the attenuator and pre-
amplifier, the voltage and amplitude of each input signal is adjusted according to the
settings such as the input coupling, probe attenuation/current-to-voltage conversion ratio,
V/div, and offset voltage. The adjusted input signal is then passed to the multiplexer.
The signal input to the multiplexer is passed to the A/D converter according to the time
axis and other settings.
At the A/D converter, the received voltage level is converted into digital values. The
digital data is written to the primary memory by the primary data processing circuit at the
sample rate that matches the time axis setting. The data written to the primary memory
is processed (averaged, for example) by the secondary data processing circuit and
written to the acquisition memory.
The data written to the acquisition memory is converted into waveform display data by
the secondary data processing circuit, transferred to the waveform processing circuit,
and stored to the display memory. The waveforms are displayed on the LCD using the
data stored to the display memory.
The block diagrams of the DL1720E are shown in figure 1.1 and figure 1.2. The block
diagrams of the DL1740E/DL1740EL are shown in figure 1.3 and figure 1.4. Figure 1.1
and figure 1.3 are block diagrams of the circuit from the analog input to the A/D
conversion circuit and trigger circuit including the attenuator, one-chip amplifier, analog
multiplexer, time base circuit, A/D converter, trigger comparator, and trigger circuit.
Figure 1.2 and figure 1.4 are block diagrams of (1) the data processing section which
processes the acquired data and displays the waveform, (2) the CPU, and (3) the
peripheral circuitry.
Chapter 1
Principles of Operation
