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ML628 IBERT Getting Started Guide
UG806 (v1.0) May 20, 2011
Running the GTH IBERT Demonstration
module are not enabled. Normally, a graceful re-start can be achieved by enabling the reference
clock and resetting the core. However, the issue is that the signal from the QUAD Reset button
does not reach the reset logic in the core. The workaround is to reload the core which is
described later in this procedure. This limitation will be fixed in a later release.
Note:
Unlike the Si5368, the Si570 on the SuperClock-2 module is an always-on clock source.
As such, this problem will not be observed if this procedure is run with the GTH reference clock
inputs connected to Si570 outputs on the SuperClock-2 module (Si570_CLK_P and
Si570_CLK_N).
Note:
This is a limitation of the GTH IBERT core only. It does not exist in the GTX IBERT core.
X-Ref Target - Figure 1-11
Figure 1-11:
GTH IBERT 2.03a with No Reference Clock
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