Xilinx ML628, Getting Started Manual

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ML628 IBERT Getting Started Guide www.xilinx.com 15
UG806 (v1.0) May 20, 2011
Running the GTH IBERT Demonstration
Starting the SuperClock-2 Module
The IBERT demonstration designs use an integrated ChipScope Pro software VIO core to
control the clocks on the SuperClock-2 module. The SuperClock-2 module features two
clock-source components: 1) An always-on Si570 crystal oscillator and, 2) an Si5386
jitter-attenuating clock multiplier. Outputs from either device can be used to drive the
transceiver reference clocks. To start the SuperClock-2 Module:
1. In the Project Panel, double-click
VIO Console
( Figure 1-13 ).
2. The clock sources on the SuperClock-2 module are controlled from the VIO Console.
Click on the
Si5368 Start
button ( Figure 1-14 ) to enable the clock output.
Note:
The ROM address values for the Si5360 and Si570 devices (i.e., Si5368 ROM Addr and
Si570 ROM Addr) are preset to 44 to produce an output frequency of 174.69 MHz. Entering a
different ROM address changes the reference clock(s) frequency. The complete list of
pre-programmed SuperClock-2 frequencies and their associated ROM addresses is provided in
Table 1-2, page 31 .
X-Ref Target - Figure 1-12
Figure 1-12: GTH IBERT 2.03a with No Reference Clock
u g 8 06_c1_12_041411
X-Ref Target - Figure 1-13
Figure 1-13: Project Panel - VIO Console (GTH)
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