MVP3
SYSTEM BOARD
AWARD BIOS SETUP
4-12
Bank 0/1 ( 2/3, 4/5)DRAM Timing :
BANK 0/1: DIMM1
BANK 2/3: DIMM2
BANK 4/5: DIMM3
The memory modules inserted onto the mainboard will be detected by the system
BIOS automatically. For example, when you insert a SDRAM module onto
DIMM1, DIMM2 or DIMM3, “SDRAM 10ns” will be displayed on the screen
shown above. (It will be “FP/EDO 70ns” when SDRAM module is absent on the
DIMM subsystem.) There are two optimum values suggested for the chipset and
CPU registers. As for SDRAM modules, “10ns” is suggested for most modules.
“8ns” will let you have begtter performance, but it may cause system unstable
when SDRAM modules are not fast enough.
SDRAM Cycle Length
This field sets the CAS latency timing.
The Choice: 2, 3.
DRAM Read Pipeline
You may select
Enabled
for this field when PBSRAMs are installed. Pipelining
improves system performance.
The Choice: Enabled, Disabled.
Cache Rd+CPU Wt Pipeline
This item allows you to enable/disable the cache timing.
The Choice: Enabled, Disabled.
Video BIOS Cacheable
When enabled. The Video BIOS cache will cause access to video BIOS
addressed at C0000H to C7FFFH to be cached, if the cache controller is also
enabled
The Choice: Enabled, Disabled.
