VIA Technologies MVP3, Operation Manual

Page: 26 / 62

MVP3
SYSTEM BOARD
HARDWARE SETUP
3-18
IDT 1 2 1 2 IDT 1 2 1 2
WinChip 2 JP1 JP14 WinChip 2 JP1 JP14
-266 JP2 JP15 -300 JP2 JP15
JP3 JP16 JP3 JP16
JP4 JP17 JP4 JP17
JP5 JP18 JP5 JP18
JP6 JP6
JP9 JP9
JP10 JP10
CPU TYPE JP1~6, JP9~10 JP14~JP18 CPU TYPE JP1~6, JP9~10 JP14~JP18
66MHz x 3.5 V
CORE
= 2.8V 66MHz x 4 V
CORE
= 2.8V
IDT 1 2 1 2 IDT 1 2 1 2
WinChip 3 JP1 JP14 WinChip 3 JP1 JP14
-266 JP2 JP15 300 JP2 JP15
JP3 JP16 JP3 JP16
JP4 JP17 JP4 JP17
JP5 JP18 JP5 JP18
JP6 JP6
JP9 JP9
JP10 JP10
CPU TYPE JP1~6, JP9~10 JP14~JP18 CPU TYPE JP1~6, JP9~10 JP14~JP18
100MHz x 2.66
V
CORE
= 2.8V 95MHz x 3 V
CORE
= 2.8V
IDT 1 2 1 2 IDT 1 2 1 2
WinChip 3 JP1 JP14 WinChip 3 JP1 JP14
-333 JP2 JP15 -350 JP2 JP15
JP3 JP16 JP3 JP16
JP4 JP17 JP4 JP17
JP5 JP18 JP5 JP18
JP6 JP6
JP9 JP9
JP10 JP10
(B) OTHER CPU CLOCK SETTING RESERVED ON THE BOARD :
66MHz x 5 66MHz x 5.5 75MHz x 3.5 75MHz x 4 75MHz x 4.5