Transtech Transputer, User Manual

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PCI Interface
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Transputer Motherboard User Manual TMB M 711
10.3.2.1 Rx Data
Rx FIFO data can be read one byte at a time from offset 00h
compatible with B004 standard software. For higher performance the
FIFO can be read by WORD or DWORD reads from offset 18h. The
data read is in order received from the C012 link (ls byte first). To
ensure valid data is read, the number of bytes available must first be
determined by reading the Rx level register.
10.3.2.2 Tx Data
Tx FIFO data can be written to one byte at a time by writing to offset
01h compatible with B004 standard software. For higher
performance the FIFO can be filled by WORD or DWORD writes to
offset 1Ch. The data should be written in the order to be send by the
C012 link (ls byte first). To ensure data is not lost, the number of
bytes of available space must first be determined by reading the Tx
level register.
Table 54: Register Map
Base + (hex) Description Access Type
00h Rx Data 8 bit Byte Read only
01h Tx Data 8 bit Byte Write only
02h Rx Status Byte Read only
03h Tx Status Byte Read only
08h Rx Data 8/16/32 bit Byte/Word/Dword Read
0Ch Tx Data 8/16/32 bit Byte/Word/Dword Write
10h Reset write/Error read Byte Read/Write
11h Analyse Byte Read
18h Rx FIFO Level Word Read
1Ch Tx FIFO Level Word Read