2-16
2.6 Timer
An 82C54 equivalent Programmable Interval Timer (PIT) is also included in the SI T9901. The PIT
has three timer/counter channels and its count clock is 1.19MHz. The timer/counters are used to
generate the system timer clock, RAM refresh request, and speaker input. The time-of-day channel
periodically generates the level-0 interrupt request to the central processor. The usage and I/O port
assignments for the PIT are presented in Table 2-4 and Table 2-5.
Table 2-4 PIT channel usage
Table 2-5 PIT I/O ports
Channel Use
0
System Timer
1
Dynamic RAM Refresh Request
2
Audio Signal for Speaker
Port
I/O
Description
'040'
I/O
Channel 0 Count Register
'041'
I/O
Channel 1 Count Register
'042'
I/O
Channel 2 Count Register
'043'
O
Control Word Register
Summary of Contents for T-Series T2200sx
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Page 17: ...2 1 Chapter 2 Operational Overview ...
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Page 43: ...3 1 Chapter 3 Troubleshooting Procedures ...
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Page 83: ...4 1 Chapter 4 Tests and Diagnostics ...
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Page 141: ...5 1 Chapter 5 Disassembly Procedures ...
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Page 169: ...6 1 Chapter 6 Reassembly Procedures ...
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Page 191: ...App 1 Appendices ...
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Page 196: ...App 6 Figure A 2 System board FSTFGx ICs back G G G G E F J H I K ...
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Page 200: ...App 10 Figure A 4 System board FSTFGx connectors back E A P Q ...
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Page 203: ...App 13 A 3 System Board FSTFGx OSCs Figure A 5 System board FSTFGx OSCs front F G H E ...
Page 204: ...App 14 Figure A 6 System board FSTFGx OSCs back A B C D ...
Page 215: ...App 25 Appendix C ASCII Character Codes Table C 1 ASCII character codes ...