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SLOS787H – MAY 2012 – REVISED APRIL 2014
6.13.3.2.3 TX Timer High Byte Control Register (0x04)
Table 6-25. TX Timer High Byte Control Register (0x04)
Function:
For Timings
Default:
0xC2 at POR = H or EN = L, and at each write to ISO Control register
Bit
Name
Function
Description
B7
tm_st1
Timer Start Condition
tm_st1 = 0, tm_st0 = 0
→
beginning of TX SOF
tm_st1 = 0, tm_st0 = 1
→
end of TX SOF
tm_st1 = 1, tm_st0 = 0
→
beginning of RX SOF
B6
tm_st0
Timer Start Condition
tm_st1 = 1, tm_st0 = 1
→
end of RX SOF
B5
tm_lengthD
Timer Length MSB
B4
tm_lengthC
Timer Length
B3
tm_lengthB
Timer Length
B2
tm_lengthA
Timer Length
B1
tm_length9
Timer Length
B0
tm_length8
Timer Length LSB
6.13.3.2.4 TX Timer Low Byte Control Register (0x05)
Table 6-26. TX Timer Low Byte Control Register (0x05)
Function:
For Timings
Default:
0x00 at POR = H or EN = L, and at each write to ISO Control register
Bit
Name
Function
Description
B7
tm_length7
Timer Length MSB
B6
tm_length6
Timer Length
Defines the time when delayed transmission is started.
B5
tm_length5
Timer Length
RX wait range is 590 ns to 9.76 ms (1 to 16383)
B4
tm_length4
Timer Length
Step size is 590 ns
B3
tm_length3
Timer Length
All bits low = timer disabled (0x00)
B2
tm_length2
Timer Length
B1
tm_length1
Timer Length
Preset 0x00 for all other protocols
B0
tm_length0
Timer Length LSB
Copyright © 2012–2014, Texas Instruments Incorporated
Detailed Description
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