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Read Data in
IRQ Status Register
Dummy Read
Write Address
Byte (0x6C)
No Data Transitions (All High or Low)
Don’t Care
Ignore
B7
B6
B5
B4
B3
B2
B1
B0
SLAVE
SELECT
MISO
MOSI
DATA _CLK
No Data Transitions (All High or Low)
B7
B6
B5
B4
B3
B2
B1
B0
SLOS787H – MAY 2012 – REVISED APRIL 2014
The procedure for a dummy read is as follows:
1. Start the dummy read:
(a) When using slave select (SS): set SS bit low.
(b) When not using SS: start condition is when Data Clock is high (see
2. Send address word to IRQ status register (0x0C) with read and continuous address mode bits set to 1
(see
3. Read 1 byte (8 bits) from IRQ status register (0x0C).
4. Dummy-read 1 byte from register 0x0D (collision position and interrupt mask).
5. Stop the dummy read:
(a) When using slave select (SS): set SS bit high.
(b) When not using SS: stop condition when Data Clock is high.
Figure 6-17. Procedure for Dummy Read
Figure 6-18. Example of Dummy Read Using SPI With SS
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Detailed Description
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