Texas Instruments Tiva TM4C123GH6PM, User Manual

Page: 84 / 352

Floating-Point Unit (FPU)
Parameters:
ui32Mode is the format for half-precision floating-point values; which is either
FPU_HALF_IEEE or FPU_HALF_ALTERNATE .
Description:
This function selects between the IEEE half-precision floating-point representation and the
Cortex-M processor alternative representation. The alternative representation has a larger
range but does not have a way to encode infinity (positive or negative) or NaN (quiet or signal-
ing). The default setting is the IEEE format.
Note:
Unless this function is called prior to executing any floating-point instructions, the default mode
is used.
Returns:
None.
9.2.1.5 ROM_FPULazyStackingEnable
Enables the lazy stacking of floating-point registers.
Prototype:
void
ROM_FPULazyStackingEnable(void)
ROM Location:
ROM_APITABLE
is an array of pointers located at
0x0100.0010
.
ROM_FPUTABLE
is an array of pointers located at
ROM_APITABLE[26]
.
ROM_FPULazyStackingEnable
is a function pointer located at
ROM_FPUTABLE[4]
.
Description:
This function enables the lazy stacking of floating-point registers s0-s15 when an interrupt is
handled. When lazy stacking is enabled, space is reserved on the stack for the floating-point
context, but the floating-point state is not saved. If a floating-point instruction is executed from
within the interrupt context, the floating-point context is first saved into the space reserved on
the stack. On completion of the interrupt handler, the floating-point context is only restored if it
was saved (as the result of executing a floating-point instruction).
This provides a compromise between fast interrupt response (because the floating-point state
is not saved on interrupt entry) and the ability to use floating-point in interrupt handlers (be-
cause the floating-point state is saved if floating-point instructions are used).
Returns:
None.
9.2.1.6 ROM_FPUNaNModeSet
Selects the NaN mode.
Prototype:
void
ROM_FPUNaNModeSet(uint32_t ui32Mode)
84 April 8, 2013