Analog to Digital Converter (ADC)
5.2.1.13 ROM_ADCPhaseDelayGet
Gets the phase delay between a trigger and the start of a sequence.
Prototype:
uint32_t
ROM_ADCPhaseDelayGet(uint32_t ui32Base)
ROM Location:
ROM_APITABLE
is an array of pointers located at
0x0100.0010
.
ROM_ADCTABLE
is an array of pointers located at
ROM_APITABLE[5]
.
ROM_ADCPhaseDelayGet
is a function pointer located at
ROM_ADCTABLE[25]
.
Parameters:
ui32Base
is the base address of the ADC module.
Description:
This function gets the current phase delay between the detection of an ADC trigger event and
the start of the sample sequence.
Returns:
Returns the phase delay, specified as one of
ADC_PHASE_0
,
ADC_PHASE_22_5
,
ADC_PHASE_45
,
ADC_PHASE_67_5
,
ADC_PHASE_90
,
ADC_PHASE_112_5
,
ADC_PHASE_135
,
ADC_PHASE_157_5
,
ADC_PHASE_180
,
ADC_PHASE_202_5
,
ADC_PHASE_225
,
ADC_PHASE_247_5
,
ADC_PHASE_270
,
ADC_PHASE_292_5
,
ADC_PHASE_315
, or
ADC_PHASE_337_5
.
5.2.1.14 ROM_ADCPhaseDelaySet
Sets the phase delay between a trigger and the start of a sequence.
Prototype:
void
ROM_ADCPhaseDelaySet(uint32_t ui32Base,
uint32_t ui32Phase)
ROM Location:
ROM_APITABLE
is an array of pointers located at
0x0100.0010
.
ROM_ADCTABLE
is an array of pointers located at
ROM_APITABLE[5]
.
ROM_ADCPhaseDelaySet
is a function pointer located at
ROM_ADCTABLE[24]
.
Parameters:
ui32Base
is the base address of the ADC module.
ui32Phase
is the phase delay, specified as one of
ADC_PHASE_0
,
ADC_PHASE_22_5
,
ADC_PHASE_45
,
ADC_PHASE_67_5
,
ADC_PHASE_90
,
ADC_PHASE_112_5
,
ADC_PHASE_135
,
ADC_PHASE_157_5
,
ADC_PHASE_180
,
ADC_PHASE_202_5
,
ADC_PHASE_225
,
ADC_PHASE_247_5
,
ADC_PHASE_270
,
ADC_PHASE_292_5
,
ADC_PHASE_315
, or
ADC_PHASE_337_5
.
Description:
This function sets the phase delay between the detection of an ADC trigger event and the start
of the sample sequence. By selecting a different phase delay for a pair of ADC modules (such
44
April 8, 2013
Summary of Contents for Tiva TM4C123GH6PM
Page 26: ...Boot Loader 26 April 8 2013...
Page 68: ...Controller Area Network CAN 68 April 8 2013...
Page 122: ...Hibernation Module 122 April 8 2013...
Page 136: ...Inter Integrated Circuit I2C 136 April 8 2013...
Page 152: ...Memory Protection Unit MPU 152 April 8 2013...
Page 174: ...Pulse Width Modulator PWM Returns None 174 April 8 2013...
Page 196: ...Synchronous Serial Interface SSI 196 April 8 2013...
Page 222: ...System Control 222 April 8 2013...
Page 270: ...UART 270 April 8 2013...
Page 296: ...uDMA Controller 296 April 8 2013...
Page 351: ...April 8 2013 351...