Timer
21.2.1.8 ROM_TimerEnable
Enables the timer(s).
Prototype:
void
ROM_TimerEnable(uint32_t ui32Base,
uint32_t ui32Timer)
ROM Location:
ROM_APITABLE
is an array of pointers located at
0x0100.0010
.
ROM_TIMERTABLE
is an array of pointers located at
ROM_APITABLE[11]
.
ROM_TimerEnable
is a function pointer located at
ROM_TIMERTABLE[1]
.
Parameters:
ui32Base
is the base address of the timer module.
ui32Timer
specifies the timer(s) to enable; must be one of
TIMER_A
,
TIMER_B
, or
TIMER_BOTH
.
Description:
This will enable operation of the timer module. The timer must be configured before it is en-
abled.
Returns:
None.
21.2.1.9 ROM_TimerIntClear
Clears timer interrupt sources.
Prototype:
void
ROM_TimerIntClear(uint32_t ui32Base,
uint32_t ui32IntFlags)
ROM Location:
ROM_APITABLE
is an array of pointers located at
0x0100.0010
.
ROM_TIMERTABLE
is an array of pointers located at
ROM_APITABLE[11]
.
ROM_TimerIntClear
is a function pointer located at
ROM_TIMERTABLE[0]
.
Parameters:
ui32Base
is the base address of the timer module.
ui32IntFlags
is a bit mask of the interrupt sources to be cleared.
Description:
The specified timer interrupt sources are cleared, so that they no longer assert. This must be
done in the interrupt handler to keep it from being called again immediately upon exit.
The
ui32IntFlags
parameter has the same definition as the
ui32IntFlags
parameter to
April 8, 2013
237
Summary of Contents for Tiva TM4C123GH6PM
Page 26: ...Boot Loader 26 April 8 2013...
Page 68: ...Controller Area Network CAN 68 April 8 2013...
Page 122: ...Hibernation Module 122 April 8 2013...
Page 136: ...Inter Integrated Circuit I2C 136 April 8 2013...
Page 152: ...Memory Protection Unit MPU 152 April 8 2013...
Page 174: ...Pulse Width Modulator PWM Returns None 174 April 8 2013...
Page 196: ...Synchronous Serial Interface SSI 196 April 8 2013...
Page 222: ...System Control 222 April 8 2013...
Page 270: ...UART 270 April 8 2013...
Page 296: ...uDMA Controller 296 April 8 2013...
Page 351: ...April 8 2013 351...