Texas Instruments Tiva TM4C123GH6PM, User Manual

Page: 133 / 352

Inter-Integrated Circuit (I2C)
Returns:
The current interrupt status, returned as true if active or false if not active.
12.2.1.17 ROM_I2CMasterIntStatusEx
Gets the current I2C Master interrupt status.
Prototype:
uint32_t
ROM_I2CMasterIntStatusEx(uint32_t ui32Base,
bool bMasked)
ROM Location:
ROM_APITABLE
is an array of pointers located at
0x0100.0010
.
ROM_I2CTABLE
is an array of pointers located at
ROM_APITABLE[3]
.
ROM_I2CMasterIntStatusEx
is a function pointer located at
ROM_I2CTABLE[31]
.
Parameters:
ui32Base is the base address of the I2C Master module.
bMasked is false if the raw interrupt status is requested and true if the masked interrupt status
is requested.
Description:
This returns the interrupt status for the I2C Master module. Either the raw interrupt status or
the status of interrupts that are allowed to reflect to the processor can be returned.
Returns:
Returns the current interrupt status, enumerated as a bit field of values described in
I2CMasterIntEnableEx().
12.2.1.18 ROM_I2CMasterLineStateGet
Reads the state of the SDA and SCL pins.
Prototype:
uint32_t
ROM_I2CMasterLineStateGet(uint32_t ui32Base)
ROM Location:
ROM_APITABLE
is an array of pointers located at
0x0100.0010
.
ROM_I2CTABLE
is an array of pointers located at
ROM_APITABLE[3]
.
ROM_I2CMasterLineStateGet
is a function pointer located at
ROM_I2CTABLE[38]
.
Parameters:
ui32Base is the base address of the I2C Master module.
Description:
This function returns the state of the I2C bus by providing the real time values of the SDA and
SCL pins.
Returns:
Returns the state of the bus with SDA in bit position 1 and SCL in bit position 0.
April 8, 2013 133