Memory Protection Unit (MPU)
ROM Location:
ROM_APITABLE
is an array of pointers located at
0x0100.0010
.
ROM_MPUTABLE
is an array of pointers located at
ROM_APITABLE[20]
.
ROM_MPUEnable
is a function pointer located at
ROM_MPUTABLE[0]
.
Parameters:
ui32MPUConfig
is the logical OR of the possible configurations.
Description:
This function enables the Cortex-M4 memory protection unit. It also configures the default
behavior when in privileged mode and while handling a hard fault or NMI. Prior to enabling the
MPU, at least one region must be set by calling
or else by enabling
the default region for privileged mode by passing the
MPU_CONFIG_PRIV_DEFAULT
flag to
. Once the MPU is enabled, a memory management fault is generated for
any memory access violations.
The
ui32MPUConfig
parameter should be the logical OR of any of the following:
MPU_CONFIG_PRIV_DEFAULT
enables the default memory map when in privileged
mode and when no other regions are defined. If this option is not enabled, then there
must be at least one valid region already defined when the MPU is enabled.
MPU_CONFIG_HARDFLT_NMI
enables the MPU while in a hard fault or NMI exception
handler. If this option is not enabled, then the MPU is disabled while in one of these
exception handlers and the default memory map is applied.
MPU_CONFIG_NONE
chooses none of the above options. In this case, no default mem-
ory map is provided in privileged mode, and the MPU will not be enabled in the fault
handlers.
Returns:
None.
14.2.1.3 ROM_MPURegionCountGet
Gets the count of regions supported by the MPU.
Prototype:
uint32_t
ROM_MPURegionCountGet(void)
ROM Location:
ROM_APITABLE
is an array of pointers located at
0x0100.0010
.
ROM_MPUTABLE
is an array of pointers located at
ROM_APITABLE[20]
.
ROM_MPURegionCountGet
is a function pointer located at
ROM_MPUTABLE[2]
.
Description:
This function is used to get the number of regions that are supported by the MPU. This is the
total number that are supported, including regions that are already programmed.
Returns:
The number of memory protection regions that are available for programming using
April 8, 2013
147
Summary of Contents for Tiva TM4C123GH6PM
Page 26: ...Boot Loader 26 April 8 2013...
Page 68: ...Controller Area Network CAN 68 April 8 2013...
Page 122: ...Hibernation Module 122 April 8 2013...
Page 136: ...Inter Integrated Circuit I2C 136 April 8 2013...
Page 152: ...Memory Protection Unit MPU 152 April 8 2013...
Page 174: ...Pulse Width Modulator PWM Returns None 174 April 8 2013...
Page 196: ...Synchronous Serial Interface SSI 196 April 8 2013...
Page 222: ...System Control 222 April 8 2013...
Page 270: ...UART 270 April 8 2013...
Page 296: ...uDMA Controller 296 April 8 2013...
Page 351: ...April 8 2013 351...