Memory Protection Unit (MPU)
enabled, a default memory map is applied. If this feature is not enabled, then a memory manage-
ment fault is generated if the MPU is enabled and no regions are configured and enabled. The MPU
can also be set to use a default memory map when in the Hard Fault or NMI handlers, instead of
using the configured regions. All of these features are selected when calling
When the MPU is enabled, it can be disabled by calling
14.2
Functions
Functions
void
(void)
void
(uint32_t ui32MPUConfig)
uint32_t
(void)
void
(uint32_t ui32Region)
void
(uint32_t ui32Region)
void
(uint32_t ui32Region, uint32_t
∗
pui32Addr, uint32_t
∗
pui32Flags)
void
(uint32_t ui32Region, uint32_t ui32Addr, uint32_t ui32Flags)
14.2.1
Function Documentation
14.2.1.1 ROM_MPUDisable
Disables the MPU for use.
Prototype:
void
ROM_MPUDisable(void)
ROM Location:
ROM_APITABLE
is an array of pointers located at
0x0100.0010
.
ROM_MPUTABLE
is an array of pointers located at
ROM_APITABLE[20]
.
ROM_MPUDisable
is a function pointer located at
ROM_MPUTABLE[1]
.
Description:
This function disables the Cortex-M4 memory protection unit. When the MPU is disabled, the
default memory map is used and memory management faults are not generated.
Returns:
None.
14.2.1.2 ROM_MPUEnable
Enables and configures the MPU for use.
Prototype:
void
ROM_MPUEnable(uint32_t ui32MPUConfig)
146
April 8, 2013
Summary of Contents for Tiva TM4C123GH6PM
Page 26: ...Boot Loader 26 April 8 2013...
Page 68: ...Controller Area Network CAN 68 April 8 2013...
Page 122: ...Hibernation Module 122 April 8 2013...
Page 136: ...Inter Integrated Circuit I2C 136 April 8 2013...
Page 152: ...Memory Protection Unit MPU 152 April 8 2013...
Page 174: ...Pulse Width Modulator PWM Returns None 174 April 8 2013...
Page 196: ...Synchronous Serial Interface SSI 196 April 8 2013...
Page 222: ...System Control 222 April 8 2013...
Page 270: ...UART 270 April 8 2013...
Page 296: ...uDMA Controller 296 April 8 2013...
Page 351: ...April 8 2013 351...