Floating-Point Unit (FPU)
9
Floating-Point Unit (FPU)
9.1
Introduction
The floating-point unit (FPU) driver provides methods for manipulating the behavior of the floating-
point unit in the Cortex-M processor. By default, the floating-point is disabled and must be enabled
prior to the execution of any floating-point instructions. If a floating-point instruction is executed
when the floating-point unit is disabled, a NOCP usage fault is generated. This feature can be
used by an RTOS, for example, to keep track of which tasks actually use the floating-point unit, and
therefore only perform floating-point context save/restore on task switches that involve those tasks.
There are three methods of handling the floating-point context when the processor executes an in-
terrupt handler: it can do nothing with the floating-point context, it can always save the floating-point
context, or it can perform a lazy save/restore of the floating-point context. If nothing is done with
the floating-point context, the interrupt stack frame is identical to a Cortex-M processor that does
not have a floating-point unit, containing only the volatile registers of the integer unit. This method
is useful for applications where the floating-point unit is used by the main thread of execution, but
not in any of the interrupt handlers. By not saving the floating-point context, stack usage is reduced
and interrupt latency is kept to a minimum.
Alternatively, the floating-point context can always be saved onto the stack. This method allows
floating-point operations to be performed inside interrupt handlers without any special precautions,
at the expense of increased stack usage (for the floating-point context) and increased interrupt
latency (due to the additional writes to the stack). The advantage to this method is that the stack
frame always contains the floating-point context when inside an interrupt handler.
The default handling of the floating-point context is to perform a lazy save/restore. When an in-
terrupt is taken, space is reserved on the stack for the floating-point context but the context is not
written. This method keeps the interrupt latency to a minimum because only the integer state is
written to the stack. Then, if a floating-point instruction is executed from within the interrupt handler,
the floating-point context is written to the stack prior to the execution of the floating-point instruction.
Finally, upon return from the interrupt, the floating-point context is restored from the stack only if
it was written. Using lazy save/restore provides a blend between fast interrupt response and the
ability to use floating-point instructions in the interrupt handler.
The floating-point unit can generate an interrupt when one of several exceptions occur. The ex-
ceptions are underflow, overflow, divide by zero, invalid operation, input denormal, and inexact
exception. The application can optionally choose to enable one or more of these interrupts and use
the interrupt handler to decide upon a course of action to be taken in each case.
The behavior of the floating-point unit can also be adjusted, specifying the format of half-precision
floating-point values, the handle of NaN values, the flush-to-zero mode (which sacrifices full IEEE
compliance for execution speed), and the rounding mode for results.
April 8, 2013
81
Summary of Contents for Tiva TM4C123GH6PM
Page 26: ...Boot Loader 26 April 8 2013...
Page 68: ...Controller Area Network CAN 68 April 8 2013...
Page 122: ...Hibernation Module 122 April 8 2013...
Page 136: ...Inter Integrated Circuit I2C 136 April 8 2013...
Page 152: ...Memory Protection Unit MPU 152 April 8 2013...
Page 174: ...Pulse Width Modulator PWM Returns None 174 April 8 2013...
Page 196: ...Synchronous Serial Interface SSI 196 April 8 2013...
Page 222: ...System Control 222 April 8 2013...
Page 270: ...UART 270 April 8 2013...
Page 296: ...uDMA Controller 296 April 8 2013...
Page 351: ...April 8 2013 351...