System Control
ROM_SysCtlPeripheralSleepDisable
is
a
function
pointer
located
at
ROM_SYSCTLTABLE[9]
.
Parameters:
ui32Peripheral
is the peripheral to disable in sleep mode.
Description:
This function causes a peripheral to stop operating when the processor goes into sleep mode.
Disabling peripherals while in sleep mode helps to lower the current draw of the device. If en-
abled (via
), the peripheral will automatically resume operation
when the processor leaves sleep mode, maintaining its entire state from before sleep mode
was entered.
Sleep mode clocking of peripherals must be enabled via
ROM_SysCtlPeripheralClockGating()
if disabled, the peripheral sleep mode configuration is maintained but has no effect when sleep
mode is entered.
The
ui32Peripheral
parameter
must
be
only
one
of
the
follow-
ing
values:
SYSCTL_PERIPH_ADC0
,
SYSCTL_PERIPH_ADC1
,
SYSCTL_PERIPH_CAN0
,
SYSCTL_PERIPH_CAN1
,
SYSCTL_PERIPH_CAN2
,
SYSCTL_PERIPH_COMP0
,
SYSCTL_PERIPH_COMP1
,
SYSCTL_PERIPH_COMP2
,
SYSCTL_PERIPH_EEPROM0
,
SYSCTL_PERIPH_GPIOA
,
SYSCTL_PERIPH_GPIOB
,
SYSCTL_PERIPH_GPIOC
,
SYSCTL_PERIPH_GPIOD
,
SYSCTL_PERIPH_GPIOE
,
SYSCTL_PERIPH_GPIOF
,
SYSCTL_PERIPH_HIBERNATE
,
SYSCTL_PERIPH_I2C0
,
SYSCTL_PERIPH_I2C1
,
SYSCTL_PERIPH_I2C2
,
SYSCTL_PERIPH_I2C3
,
SYSCTL_PERIPH_I2C4
,
SYSCTL_PERIPH_I2C5
,
SYSCTL_PERIPH_PWM0
,
SYSCTL_PERIPH_PWM1
,
SYSCTL_PERIPH_QEI0
,
SYSCTL_PERIPH_QEI1
,
SYSCTL_PERIPH_SSI0
,
SYSCTL_PERIPH_SSI1
,
SYSCTL_PERIPH_SSI2
,
SYSCTL_PERIPH_SSI3
,
SYSCTL_PERIPH_TIMER0
,
SYSCTL_PERIPH_TIMER1
,
SYSCTL_PERIPH_TIMER2
,
SYSCTL_PERIPH_TIMER3
,
SYSCTL_PERIPH_TIMER4
,
SYSCTL_PERIPH_TIMER5
,
SYSCTL_PERIPH_UART0
,
SYSCTL_PERIPH_UART1
,
SYSCTL_PERIPH_UART2
,
SYSCTL_PERIPH_UART3
,
SYSCTL_PERIPH_UART4
,
SYSCTL_PERIPH_UART5
,
SYSCTL_PERIPH_UART6
,
SYSCTL_PERIPH_UART7
,
SYSCTL_PERIPH_UDMA
,
SYSCTL_PERIPH_USB0
,
SYSCTL_PERIPH_WDOG0
,
SYSCTL_PERIPH_WDOG1
,
SYSCTL_PERIPH_WTIMER0
,
SYSCTL_PERIPH_WTIMER1
,
SYSCTL_PERIPH_WTIMER2
,
SYSCTL_PERIPH_WTIMER3
,
SYSCTL_PERIPH_WTIMER4
, or
SYSCTL_PERIPH_WTIMER5
.
Returns:
None.
18.2.1.25 ROM_SysCtlPeripheralSleepEnable
Enables a peripheral in sleep mode.
Prototype:
void
ROM_SysCtlPeripheralSleepEnable(uint32_t ui32Peripheral)
ROM Location:
ROM_APITABLE
is an array of pointers located at
0x0100.0010
.
ROM_SYSCTLTABLE
is an array of pointers located at
ROM_APITABLE[13]
.
April 8, 2013
215
Summary of Contents for Tiva TM4C123GH6PM
Page 26: ...Boot Loader 26 April 8 2013...
Page 68: ...Controller Area Network CAN 68 April 8 2013...
Page 122: ...Hibernation Module 122 April 8 2013...
Page 136: ...Inter Integrated Circuit I2C 136 April 8 2013...
Page 152: ...Memory Protection Unit MPU 152 April 8 2013...
Page 174: ...Pulse Width Modulator PWM Returns None 174 April 8 2013...
Page 196: ...Synchronous Serial Interface SSI 196 April 8 2013...
Page 222: ...System Control 222 April 8 2013...
Page 270: ...UART 270 April 8 2013...
Page 296: ...uDMA Controller 296 April 8 2013...
Page 351: ...April 8 2013 351...