Texas Instruments Tiva TM4C123GH6PM, User Manual

Page: 343 / 352

Watchdog Timer
Note:
Because there is a write buffer in the Cortex-M4 processor, it may take several clock cycles
before the interrupt source is actually cleared. Therefore, it is recommended that the interrupt
source be cleared early in the interrupt handler (as opposed to the very last action) to avoid
returning from the interrupt handler before the interrupt source is actually cleared. Failure to
do so may result in the interrupt handler being immediately reentered (because the interrupt
controller still sees the interrupt source asserted).
Returns:
None.
25.2.1.3 ROM_WatchdogIntEnable
Enables the watchdog timer interrupt.
Prototype:
void
ROM_WatchdogIntEnable(uint32_t ui32Base)
ROM Location:
ROM_APITABLE
is an array of pointers located at
0x0100.0010
.
ROM_WATCHDOGTABLE
is an array of pointers located at
ROM_APITABLE[12]
.
ROM_WatchdogIntEnable
is a function pointer located at
ROM_WATCHDOGTABLE[11]
.
Parameters:
ui32Base is the base address of the watchdog timer module.
Description:
Enables the watchdog timer interrupt.
Note:
This function will have no effect if the watchdog timer has been locked.
See also:
ROM_WatchdogLock() , ROM_WatchdogUnlock() , ROM_WatchdogEnable()
Returns:
None.
25.2.1.4 ROM_WatchdogIntStatus
Gets the current watchdog timer interrupt status.
Prototype:
uint32_t
ROM_WatchdogIntStatus(uint32_t ui32Base,
bool bMasked)
ROM Location:
ROM_APITABLE
is an array of pointers located at
0x0100.0010
.
ROM_WATCHDOGTABLE
is an array of pointers located at
ROM_APITABLE[12]
.
ROM_WatchdogIntStatus
is a function pointer located at
ROM_WATCHDOGTABLE[12]
.
April 8, 2013 343