VIN_OVP_FAULT FLAG and STAT bits are updated over I
2
C. Once the OVP fault is removed, the STAT bit is
cleared and the device returns to normal operation. The FLAG bit is not cleared until it is read through I
2
C after
the OVP condition no longer exists. The OVP threshold for the device is 6.2 V (typ) on powerup either when VIN
or VBAT is valid.
9.3.2.2 Safety Timer and I
2
C Watchdog Timer
At the beginning of the charge cycle, the device starts the safety timer. If charging has not terminated before the
programmed safety time, t
MAXCHG
, expires, charging is disabled. The pre-charge safety time, t
PRECHG
, is 25% of
t
MAXCHG
. When a safety timer fault occurs, a single 128-µs pulse is sent on the INT pin and the
SAFETY_TMR_FAULT_FLAG bit in the FLAG3 register is updated over I
2
C. The CE pin or input power must be
toggled in order to reset the safety timer and exit the fault condition. Note that the flag bit will be reset when the
bit is read by the host even if the fault has not been cleared. The safety timer duration is programmable using the
SAFETY_TIMER bits. When the safety timer is active, changing the safety timer duration resets the safety timer.
The device also contains a 2X_TIMER bit that doubles the timer duration in order to prevent premature safety
timer expiration when the charge current is reduced by a high load on PMID (DPPM operation), VIN DPM,
thermal regulation, or a NTC (JEITA) condition. When 2X_TIMER function is enabled, the timer is allowed to run
at half speed when any loop is active other than CC or CV.
In addition to the safety timer, the device contains a 50-second I
2
C watchdog timer that monitors the host
through the I
2
C interface. The watchdog timer is enabled by default and may be disabled by the host through
I
2
C. Once the watchdog timer is enabled, the watchdog timer is started. The watchdog timer is reset by any
transaction by the host using the I
2
C interface. If the watchdog timer expires without a reset from the I
2
C
interface, all charger parameters registers (ICHARGE, IPRECHARGE, ITERM,VLOWV, etc.) are reset to the
default values.
9.3.2.3 Thermal Protection and Thermal Charge Current Foldback
During operation, to protect the device from damage due to overheating, the junction temperature of the die, T
J
,
is monitored. When T
J
reaches T
SHUTDOWN
the device stops operation and is turned off. The device resumes
operation when T
J
falls below T
SHUTDOWN
by T
HYS
.
During the charging process, to prevent overheating in the device, the device monitors the junction temperature
of the die and reduces the charging current at a rate of (0.04 x I
CHARGE
)/°C once T
J
exceeds the thermal
foldback threshold, T
REG
. If the charge current is reduced to 0, the battery supplies the current needed to supply
the PMID output. The thermal regulation threshold may be set through I
2
C by setting the THERM_REG bits to
the desired value.
To ensure that the system power dissipation is under the limits of the device. The power dissipated by the device
can be calculated using
/
DISS
PMID
LS LDO
BAT
P
P
P
P
(1)
Where:
(
)
PMID
IN
PMID
IN
P
V
V
I
u
(2)
/
/
/
(
)
LS LDO
INLS
LS LDO
LS LDO
P
V
V
I
u
(3)
(
)
BAT
PMID
BAT
BAT
P
V
V
I
u
(4)
The die junction temperature, T
J
, can be estimated based on the expected board performance using
:
SLUSEC5 – DECEMBER 2020
20
Copyright © 2020 Texas Instruments Incorporated
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Summary of Contents for BQ25157
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