Terasic DE1-SOC, User Manual

Page: 24 / 114

23
There are ten slide switches connected to FPGA on the board (See Figure 3-14 ). These switches are
not debounced, and are assumed for use as level-sensitive data inputs to a circuit. Each switch is
connected directly to a pin on the Cyclone V SoC FPGA. When the switch is in the DOWN position
(closest to the edge of the board), it provides a low logic level to the FPGA, and when the switch is
in the UP position it provides a high logic level.
Figure 3-14 Connections between the slide switches and Cyclone V SoC FPGA
There are also ten user-controllable LEDs connected to FPGA on the board. Each LED is driven
directly by a pin on the Cyclone V SoC FPGA; driving its associated pin to a high logic level turns
the LED on, and driving the pin low turns it off.
Figure 3-15 shows the connections between LEDs
and Cyclone V SoC FPGA. Table 3-9 , Table 3-10 and Table 3-11 list the pin assignments of these
user interfaces.