Apoolo-S10
User Manual
14
www.terasic.com
March 31, 2020
Chapter 2
Board Component
his chapter introduces all the important components on the Apollo S10.
2.1
Configuration Interface
This section describes the configuration mode for Stratix 10 SX FPGAs available on
the Apollo S10. The peripheral circuits and usage scenarios for each mode will be
listed.
As shown in
, the mode select pin of the FPGA on the Apollo-S10 board has
been set to
Active Serial (AS) mode
using resistors. Thus, the Apollo S10 board
supports the following configuration modes:
JTAG Mode (Configure the FPGA using the on-board USB-Blaster II).
Active Serial (AS) mode
Users can use these modes to configure the FPGA or HPS (Hardware Process System)
fabric in the Stratix 10 SX FPGA and make the FPGA to run the user's logic or boot the
HPS to run the OS.
Below we will introduce more detailed information of AS mode, as well as other
configuration information.
T