Tektronix 2236, Instruction Manual

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Theory of Operation— 2236 Service
When a DMM control word is received which enables
U1904, U1907B and U1907C switch at a 400 Hz rate and
use the “Y” input connection for 60% of each cycle. For the
part of the cycle that connects the “X” inputs to the switch
outputs, U1900C compares the Ohms Drive signal through
R1945 with DMM common. Any difference is integrated by
Cl 912 and applied through R1918 and Cl 911 to the
noninverting input of U1950. Therefore the Ohms Drive line
is driven and held to about zero volts by a closed loop regu­
lator. The current required to hold U1950 pin 3 at ground
potential causes Cl 911 to charge such that the output of
U1900C swings in a negative direction.
When the switches connect the “Y” inputs to the switch
outputs, U1907C connects Cl 911 to the 2.5 Volts refer­
ence, causing the input signal to U1950 to swing to about
4.5 V. From there it slowly swings in a negative direction. 1C
U1900C remains in a loop closed by R1917, and its output
settles quickly to a point determined by R1916 and R1917
which is roughly the same as that output level which is first
needed when the switches return to the “X” state.
The resulting Ohms Drive signal has a flat bottom at zero
volts, a tilted top at approximately 4.5 V, and is at this HI
level for 60% of the cycle. The average value of this rectan­
gular waveform present at the 12 Ref input to U1905 is ex­
actly equal to the dc level (about 2.5 V) present there when
U1904 is disabled.
Overload Protection
The overload protection circuit protects the ohmmeter
circuitry from damage when high voltages are applied to the
DMM inputs.
Under overload conditions, high input voltages may be
applied through a relay contact, through the corresponding
portion of the input divider network, and on to the Ohms
Drive line. This voltage is in turn applied to R1960 and
RT1915, resulting in high current which could damage the
relay contact if it opened. If the currents are large enough to
exceed the output source or sink capabilities of U1950, the
op amp will current limit and the excess current will be ab­
sorbed by VR1903, VR1904, and either Q1910 or Q1911,
depending on signal polarity. The transistor which is biased
on will pull its collector toward ground and disable U1906
from changing output states by removing the HI at enable
pin 1 through CR1975. Transistor Q1970 will be biased on
by R1976 and R1977 and the Ohms Protect line will go HI.
This will bias on Q1810 and the relay coil common line will
be held LO to keep the relay contact closed.
Thermistor RT1915 heats due to the power it is dissipat­
ing until it reaches 80 °C. Its resistance then rises dramati­
cally to reduce both the overload current level and its
internal power dissipation. When the overload current level
drops to an amount that U1950 can source or sink, current
will no longer flow through VR1903 and VR1904. Both
Q1910 and Q1911 will be biased off, allowing R1976,
R1977, and R1978 to charge Cl 976. The increasing voltage
will reverse bias CR1975 to enable U1906 to function again
and will bias off Q1970. Capacitor Cl 975 can then charge,
and Q1810 will be biased on if one of the relays is also on.
Resistors R1978 and R1981 limit transient current when the
overload circuit is first activated.
Serial Interface
The serial interface circuit uses serial-in, parallel-out shift
register U1906 to receive microprocessor control words
from opto-isolators U1804 and U1805.
When a new 8 bit serial message is transmitted, the
Clock line goes LO. Diode CR1910 discharges Cl 918 to pull
input enable pin 1 LO and prevents the output latches from
changing states. Data is applied to pin 2 and is clocked into
the shift register by positive transitions of the clock input
(pin 3). These clock pulses are HI for no more than 1 ms so
that C l918 cannot charge and place a HI on enable pin 1.
When the message has been transmitted, the clock goes HI
and reverse biases CR1910. Capacitor Cl 918 then charges
through R1936 to a HI and, after approximately 5 ms, the
new data is latched into the outputs. Thus the register out­
puts are fully buffered.
The filter composed of R1982 and Cl 982 reject spurious
clock signals which can result from large common mode
transients across the opto-isolators.
R elay Drive
Four control word bits drive range-relays K1801 through
K1804 through Darlington emitter-followers Q1901 through
Q1904. A relay is energized by a HI being placed on the
base of its driver by U1906. Resistors R1951, R1952,
R1953, and R1954 supply base drive to Q1810, and the
transistor will be biased on if any of the four relays is ener­
gized. The relay coil common (pin 2 of each relay) will then
be pulled low to about a diode drop above ground. If no
relays are enabled (as in the high ohms ranges), then all
relay coil drives disconnect and the coils are guarded
through R1823 to the output of the Hi-Z Buffer.
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