S i M 3 L 1 x x
Rev 1.1
11
Power Mode 2
with only Port I/O clocks on (wake
from pin).
I
BAT
F
AHB
= 49
MHz,
F
APB
= 24.5
MHz
—
4
7.2
mA
F
AHB
= 20
MHz,
F
APB
= 10
MHz
—
1.47
—
mA
F
AHB
= 2.5
MHz,
F
APB
= 1.25
MHz
—
430
—
μ
A
Power Mode 3
—Fast-Wake
Mode (PM3CLKEN = 1)
I
BAT
V
BAT
= 3.8
V
—
320
530
μ
A
V
BAT
= 1.8
V
—
225
—
μ
A
Power Mode 4
—Slower clock
speed with code executing from
flash, peripheral clocks ON
I
BAT
F
AHB
= F
APB
= 16
kHz,
V
BAT
= 3.8
V
—
385
640
μ
A
F
AHB
= F
APB
= 16
kHz,
V
BAT
= 1.8
V
—
330
—
μ
A
Power Mode 5
—Slower clock
speed with code executing from
RAM, peripheral clocks ON
I
BAT
F
AHB
= F
APB
= 16
kHz,
V
BAT
= 3.8
V
—
320
490
μ
A
F
AHB
= F
APB
= 16
kHz,
V
BAT
= 1.8
V
—
275
—
μ
A
Power Mode 6
—Core halted
with peripheral clocks ON
I
BAT
F
AHB
= F
APB
= 16
kHz,
V
BAT
= 3.8
V
—
315
490
μ
A
F
AHB
= F
APB
= 16
kHz,
V
BAT
= 1.8
V
—
270
—
μ
A
Power Mode 8
Sleep, powered through VBAT,
VIO, and VIORF at 2.4
V, 32kB of
retention RAM
I
BAT
RTC Disabled,
T
A
= 25 °C
—
75
400
nA
RTC w/ 16.4
kHz LFO,
T
A
= 25 °C
—
360
—
nA
RTC w/ 32.768
kHz Crystal,
T
A
= 25 °C
—
670
—
nA
Table
3.2.
Power Consumption (Continued)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Notes:
1.
Currents are additive. For example, where
I
BAT
is specified and the mode is not mutually exclusive, enabling the
functions increases supply current by the specified amount.
2.
I
ncludes all peripherals that cannot have clocks gated in the Clock Control module.
3.
Includes LDO and PLL0OSC (>20 MHz) or LPOSC0 (<20 MHz) supply current.
4.
Internal Digital and Memory LDOs scaled to optimal output voltage.
5.
Flash AHB clock turned off.
6.
Running from internal LFO, Includes LFO supply current.
7.
LCD0 current does not include switching currents for external load.
8.
IDAC output current not included.
9.
Does not include LC tank circuit.
10.
Does not include digital drive current or pullup current for active port I/O. Unloaded I
VIO
is included in all I
BAT
PM8
production test measurements.
Summary of Contents for SiM3L1xx
Page 2: ...2 Rev 1 1 ...
Page 62: ...SiM3L1xx 62 Rev 1 1 6 2 SiM3L1x6 Pin Definitions Figure 6 2 SiM3L1x6 GQ Pinout ...
Page 63: ...SiM3L1xx Rev 1 1 63 Figure 6 3 SiM3L1x6 GM Pinout ...
Page 69: ...SiM3L1xx Rev 1 1 69 6 3 SiM3L1x4 Pin Definitions Figure 6 4 SiM3L1x4 GM Pinout ...
Page 74: ...SiM3L1xx 74 Rev 1 1 6 4 TQFP 80 Package Specifications Figure 6 5 TQFP 80 Package Drawing ...
Page 81: ...SiM3L1xx Rev 1 1 81 6 6 TQFP 64 Package Specifications Figure 6 9 TQFP 64 Package Drawing ...
Page 89: ...SiM3L1xx Rev 1 1 89 Figure 7 3 SiM3L1x4 GM Revision Information ...