Silicon Laboratories SiM3L1xx, User Manual

Page: 28 / 91

S i M 3 L 1 x x
28 Rev 1.1
Positive Hysteresis
Mode 3 (CPMD
= 11)
HYS
CP+
CMPHYP = 00 — 1.37 — mV
CMPHYP = 01 — 3.8 — mV
CMPHYP = 10 — 7.8 — mV
CMPHYP = 11 — 15.6 — mV
Negative Hysteresis
Mode 3 (CPMD
= 11)
HYS
CP-
CMPHYN = 00 — 1.37 — mV
CMPHYN = 01 — –3.9 — mV
CMPHYN = 10 — –7.9 — mV
CMPHYN = 11 — –16 — mV
Input Range (CP+ or CP–) V
IN
–0.25 — V
BAT
+
0.25
V
Input Pin Capacitance C
CP
— 7.5 — pF
Common-Mode Rejection Ratio CMRR
CP
— 75 — dB
Power Supply Rejection Ratio PSRR
CP
— 72 — dB
Input Offset Voltage V
OFF
T
A
= 25 °C –10 0 10 mV
Input Offset Tempco TC
OFF
— 3.5 — μ V/°C
Reference DAC Resolution N
Bits
6 bits
Table 3.15. LCD0
Parameter Symbol Test Condition Min Typ Max Unit
Charge Pump Output Voltage Error V
CPERR
— ±50 — mV
LCD Clock Frequency F
LCD
16 — 33 kHz
Table 3.14. Comparator (Continued)
Parameter Symbol Test Condition Min Typ Max Unit