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Table 16.59. 0x009D Slow LOL Detection Value
Reg Address
Bit Field
Type
Setting Name
Description
0x009D
1:0
R/W
LOL_SLW_VAL-
WIN_SEL_PLLA
Values calculated by CBPro
0x009D
3:2
R/W
LOL_SLW_VAL-
WIN_SEL_PLLB
0x009D
5:4
R/W
LOL_SLW_VAL-
WIN_SEL_PLLC
0x009D
7:6
R/W
LOL_SLW_VAL-
WIN_SEL_PLLD
Table 16.60. 0x009E LOL Set Thresholds
Reg Address
Bit Field
Type
Setting Name
Description
0x009E
3:0
R/W
LOL_SLW_SET_TH
R_PLLA
Configures the loss of lock set thresholds. See list be-
low for selectable values.
0x009E
7:4
R/W
LOL_SLW_SET_TH
R_PLLB
Configures the loss of lock set thresholds. See list be-
low for selectable values.
Table 16.61. 0x009F LOL Set Thresholds
Reg Address
Bit Field
Type
Setting Name
Description
0x009F
3:0
R/W
LOL_SLW_SET_TH
R_PLLC
Configures the loss of lock set thresholds. See list be-
low for selectable values.
0x009F
7:4
R/W
LOL_SLW_SET_TH
R_PLLD
Configures the loss of lock set thresholds. See list be-
low for selectable values.
The following are the LOL_SLW_SET_THR_PLLx thresholds for the value that is placed in the four bits for DSPLLs.
• 0 = ±0.1 ppm
• 1 = ±0.3 ppm
• 2 = ±1 ppm
• 3 = ±3 ppm
• 4 = ±10 ppm
• 5 = ±30 ppm
• 6 = ±100 ppm
• 7 = ±300 ppm
• 8 = ±1000 ppm
• 9 = ±3000 ppm
• 10 = ±10000 ppm
• 11 - 15 Reserved
Table 16.62. 0x00A0 LOL Clear Thresholds
Reg Address
Bit Field
Type
Setting Name
Description
0x00A0
3:0
R/W
LOL_SLW_CLR_TH
R_PLLA
Configures the loss of lock clear thresholds. See list be-
low for selectable values.
0x00A0
7:4
R/W
LOL_SLW_CLR_TH
R_PLLB
Configures the loss of lock clear thresholds. See list be-
low for selectable values.
Si5397/96 Reference Manual
Si5397C/D Register Map
silabs.com
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