Siemens SIMATIC S7-300 FM 350-1 Manual Download Page 167

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Encoder signals and their evaluation

8.4 Signal evaluation

FM 350-1 Counter module
Manual, 05/2011, A5E03648639-01

167

Double evaluation

Double evaluation refers to the evaluation of the positive and negative edges of signal A.

The logic level at signal B determines the count direction, i.e. the up or down count pulse.
The diagram shows the double evaluation of signals:

6LJQDO$$

6LJQDO%%

8SFRXQW
SXOVHV

'RZQFRXQW
SXOVHV

'RZQ

Figure 8-5

Double evaluation

Quadruple evaluation

Quadruple evaluation refers to the evaluation of the positive and negative edges of signals A

and B. The logic level at the signals A and B determines the count direction, i.e. the up or

down count pulse.
The diagram shows quadruple evaluation of signals:

6LJQDO$$

6LJQDO%%

8SFRXQW
SXOVHV

'RZQFRXQW
SXOVHV

'RZQ

Figure 8-6

Quadruple evaluation

Default

Single evaluation is set by default.

Summary of Contents for SIMATIC S7-300 FM 350-1

Page 1: ...__________ ___________________ ___________________ SIMATIC S7 300 FM 350 1 Counter module Manual 05 2011 A5E03648639 01 Preface Product Overview 1 Installing and removing FM 350 1 2 Wiring the FM 350 1 3 Programming FM 350 1 4 Programming the FM 350 1 5 Commissioning FM 350 1 6 Operating Modes parameters and commands 7 Encoder signals and their evaluation 8 DB assignments 9 Errors and diagnostics ...

Page 2: ...nce with the relevant documentation in particular its warning notices and safety instructions Qualified personnel are those who based on their training and experience are capable of identifying risks and avoiding potential hazards when working with these products systems Proper use of Siemens products Note the following WARNING Siemens products may only be used for the applications described in th...

Page 3: ...Windows operating systems and have a knowledge of STEP 7 programming Scope of this Manual The present manual contains the description of function module FM 350 1 applicable at the time the manual was published We reserve the right to describe changes of FM 350 1 functionality in a Product Information Leaflet Apply to the FM 350 1 The contents of the Manual Order no MLFB Version Without latch Witho...

Page 4: ...l Training Center or the central Training Center in D 90327 Nuremberg Germany Internet SITRAIN homepage http www sitrain com Technical Support You can access technical support for all A D projects via the following Online support request form http www siemens com automation support request Service Support on the Internet In addition to our documentation we offer a comprehensive online knowledge ba...

Page 5: ...nstalling Parameterization Interfaces 36 4 2 Starting Parameterization Interfaces 37 5 Programming the FM 350 1 39 5 1 Data exchange between the user program and FM 350 1 40 5 2 The function FC CNT_CTL1 FC 2 41 5 3 The FC CNT_CTL2 function FC 3 48 5 4 The FC DIAG_INF function FC 1 49 5 5 Application example 50 5 6 Technical specifications of the blocks 53 5 7 Programming FM 350 1 without FCs 54 5 ...

Page 6: ...9 Hysteresis 117 7 3 10 Command Setting the counter 120 7 3 11 Command Latch retrigger 127 7 3 12 Command Latch 130 7 3 13 Command Measure edge intervals 133 7 4 Measuring modes 134 7 4 1 Overview of measuring modes 134 7 4 2 Basics 135 7 4 3 Frequency measuring 140 7 4 4 Speed capture 143 7 4 5 Period measurement 146 7 4 6 Command Open and close gate 149 7 4 7 Behavior of the Digital Outputs 153 ...

Page 7: ...ents FM 350 1 Counter module Manual 05 2011 A5E03648639 01 7 11 Technical data 183 11 1 General technical specifications 183 11 2 Technical data 184 12 Replacement parts 187 13 References 189 Glossary 191 Index 195 ...

Page 8: ...Table of contents FM 350 1 Counter module 8 Manual 05 2011 A5E03648639 01 ...

Page 9: ...hapter provides an overview of the FM 350 1 function module You get to know the properties of FM 350 1 Examples demonstrate various applications of FM 350 1 You will learn how the FM 350 1 is integrated into the S7 300 automation system and familiarize yourself with the vital components of FM 350 1 ...

Page 10: ...nting Frequency measurement Speed measurement Period measurement You can start and stop each mode either via the user program software gate or via external signals hardware gate Comparison Values You can store two comparison values on the module assigned to the two relevant outputs on the module If the counter status reaches one of the two comparison values the relevant output can be set to initia...

Page 11: ...se duration This value applies to both outputs You can adapt the FM 350 1 to existing actuators by specifying a pulse duration Which Signals Can the FM 350 1 Register The FM 350 1 can register the signals from the following sources Incremental 5 V encoders Incremental 24 V encoders 24 V pulse encoders with direction level 24 V initiators without direction level for example light barrier or BERO In...

Page 12: ...it is possible with the help of STEP 7 HW Config as of V 5 2 to download firmware updates to the operating system memory of FM 350 1 Note Starting the firmware updates deletes the old FM 350 1 firmware If the firmware update is interrupted or terminated the FM 350 1 will no longer be capable of functioning In this case start the firmware update again and wait until it has been completed successful...

Page 13: ...Application for the FM 350 1 In this example a carton is to be filled with a specific number of parts One counter of the FM 350 1 counts the parts and controls the motor for transporting the parts and the motor for transporting the carton If the carton is in the correct position Conveyor belt A is stopped via Light barrier A the count is started and Motor B for Conveyor belt B is switched on When ...

Page 14: ...ew 1 2 Areas of application of the FM 350 1 FM 350 1 Counter module 14 Manual 05 2011 A5E03648639 01 LJKW EDUULHU LJKW EDUULHU JDWH 0RWRU RQYH RU RQYH RU 0RWRU 0 Figure 1 1 Example for Using an FM 350 1 in the S7 300 ...

Page 15: ...0 7 LQWHUIDFH 9HUVLRQ 2UGHU QXPEHU DEHOLQJ VWULSV RGLQJ FRQQHFWRU Figure 1 2 FM 350 1 module view Front Connector The FM 350 1 offers the following connection possibilities at the front connector 5 V or 24 V encoder signals Encoder supply Digital input signals for starting stopping and setting the counter Digital output signals Q0 and Q1 Auxiliary voltage 1L for generating the encoder supply volta...

Page 16: ...oder signals A 5 V differential signals state as supplied D 24 V signals The coding plug is located on the left side of the FM 350 1 Labeling Strips Enclosed with the module is a labeling strip on which you can write your relevant signal names The pin assignments are printed on the inside of the front panel Order Number and Version The order number and the version of the FM 350 1 are specified at ...

Page 17: ... FM 350 1 and its digital inputs and outputs Table 1 3 LEDs with their labeling color and function Label Color Function SF Red Group errors CR Green Counter running status of the least significant bit of the counter DIR Green Direction of count LED lights up if the counter is counting down I0 Green Status of DI Start I1 Green Status of DI Stop I2 Green Status of DI Set Q0 Green Status of output DO...

Page 18: ...configuration with an FM 350 1 Parameterization Interfaces The FM 350 1 is adapted to the task in hand via parameters These parameter are stored in an SDB and transferred to the module from the CPU You can specify the parameters via the parameterization interfaces These parameterization interfaces are installed on your programming device and are called up within STEP 7 Software for the S7 300 CPU ...

Page 19: ...hapter Overview This chapter contains information on installing and removing the FM 350 1 You will learn what you must look out for when installing You will get notes and hints on configuring arranging and installing an FM 350 1 You will learn step by step how to install and remove an FM 350 1 ...

Page 20: ...le can be installed like a signal module in any of Slots 4 to 11 Rules for Configuring the Mechanical Installation Refer to manual 1 for possibilities for the mechanical structure and how to proceed when configuring The following offers brief extra information A maximum of eight SMs or FMs are permissible per rack The maximum number is restricted by the width of the modules or the length of the mo...

Page 21: ... You require a flat bladed screwdriver 4 5 mm to install the FM 350 1 Setting the Signal Type Coding Plug Before mounting an FM 350 1 on the mounting rail you must place the coding key in the correct position Table 2 1 Correlation between the position of the coding plug and the signal mode Position of the coding plug Signal mode A 5 V differential signals D 24 V signals The letter of the coding pl...

Page 22: ...50 1 onto the rail and swing it down 4 Tighten the screw on the FM 350 1 tightening torque approximately 0 8 to 1 1 Nm If you want to install further modules to the right of the FM 350 1 first connect the expansion bus of the next module to the right hand backplane bus connector of the FM 350 1 If the FM 350 1 is the last module in the rack do not connect an expansion bus 5 Label the FM 350 1 with...

Page 23: ...for Removal Replacement of Modules How to remove the FM 350 1 1 Switch off the auxiliary voltage and the load voltage at the front connector 2 Switch the CPU to STOP Switch off the power supply 3 Open the front door If necessary remove the labeling strips 4 Release the front connector and pull it out 5 Loosen the fixing screw on the module 6 Swing the module out of the mounting rail and unhook it ...

Page 24: ...Installing and removing FM 350 1 2 3 Removing FM 350 1 FM 350 1 Counter module 24 Manual 05 2011 A5E03648639 01 ...

Page 25: ...iew This chapter contains the following information on wiring the FM 350 1 Terminal assignment of the front connector The functions of the connections Notes on selecting cables The steps to take when wiring the front connector The status of the wired module after switching on the power supply ...

Page 26: ...gnals the digital inputs and digital outputs the encoder supply and the auxiliary voltage and load voltage via the 20 pin front connector The figure shows the front of the module the front connector and the inside of the front panel with the pin assignments 0 2817 5 02 8 6 5 5 4 4 0 0 9 6833 9 1 1 1 0 URQW RI WKH PRGXOH URQW FRQQHFWRU QVLGH RI WKH IURQW SDQHO Figure 3 1 Front connector of the FM 3...

Page 27: ... signal B Encoder signal B Directional signal 9 B ON Encoder signal B 10 N N ON Encoder signal N Encoder signal N 11 N ON Encoder signal N 12 Digital Inputs and Digital Outputs 13 I0 ON Digital input DI Start 14 I1 ON Digital input DI Stop 15 I2 ON Digital input DI Set 16 17 Q0 OFF Digital output DO0 18 Q1 OFF Digital output DO1 Load voltage 19 2L ON 24 V load voltage 20 2M ON Load voltage ground ...

Page 28: ...s monitored for short circuit 5 V Sensor Signals A and A B and B N and N You can connect incremental encoders with 5 V differential signals to the front connector in accordance with RS 422 that is incremental encoders with the differential signals A and A B and B N and N The signals A and A B and B N and N are connected via the correspondingly labeled terminals The signals N and N are only connect...

Page 29: ...top for the gate control of the counter Gate control can be both level controlled and edge controlled refer to the chapter Operating Modes Parameters and Commands Page 83 Digital input DI Set is used to set the counter to the load value The digital inputs are operated with a nominal voltage of 24 V The digital inputs are optically isolated from the bus of the S7 300 and the counter inputs Input Fi...

Page 30: ...ts and can be loaded with a load current of 0 5 A They are protected from overload and short circuit Note Relays and contactors can be connected direct without external circuitry The time characteristics of the digital outputs depend on the parameterization and are explained in more detail in the chapter Operating Modes Parameters and Commands Page 83 Load Voltage 2L 2M For supplying digital outpu...

Page 31: ...ed The cable for the counter signals must be shielded You must apply the shields of the counter signal cables both at the pulse encoder and in the immediate vicinity of the module via the shield attachment for example The following cables of the incremental 5 V encoder have to be twisted in pairs A and A B and B N and N 1 1 9 0 6KLHOG RQ VKLHOG VXSSRUW 6KLHOG RQ KRXVLQJ URQW FRQQHFWRU 7ZLVWHG FDEO...

Page 32: ... URQW FRQQHFWRU 6KLHOG RQ KRXVLQJ Figure 3 3 Details Regarding the Connection of an Incremental 24V Encoder Use flexible cables with cross sections of 0 25 to 1 5 mm2 Note If the encoders are supplied via the module the cable cross section must be large enough to carry the required voltage to the encoder despite voltage drops over the cable This applies especially in the case of incremental 5 V en...

Page 33: ...rip the conductors length 6 mm 3 Do you want to use end ferrules If yes Press the end ferrules and the cables together 4 Feed the enclosed strain relief clamp into the front connector 5 If the wires leave the module at the bottom begin wiring at the bottom otherwise begin at the top Also screw tight unassigned terminals tightening torque 0 6 to 0 8 Nm 6 Tighten the strain relief clamp for the cabl...

Page 34: ...t inverted single evaluation refer to the section Signal Evaluation Page 166 0 to 32 bit counting range Counter status zero Set counter with signal at input DI Set and zero mark locked Input delay for digital inputs DI Start DI Stop and DI Set typically 1 µs max frequency 200 kHz minimum pulse width 2 5 µs Input delay at 24 V counter inputs typically 1 µs max frequency 200 kHz minimum pulse width ...

Page 35: ...35 Programming FM 350 1 4 Chapter Overview In this chapter you will learn how to install and start parameterization interfaces The parameterization interfaces have an integrated help function that supports you in parameterizing and starting up the FM 350 1 ...

Page 36: ...ameterization Interfaces To install the configuration package 1 Place the supplied CD in the CD drive of your programming device PC 2 Start the program Setup exe 3 Follow the operating instructions provided by the installation program Important information about the installation can be found in the readme file Result The components of the configuration package are installed in the following direct...

Page 37: ...zation Interfaces Starting the Parameterization Interfaces 1 In HW Config Select the FM 350 1 in your hardware catalog Place the module on a vacant slot 2 Double click the FM 350 1 3 Adapt the configuration of the FM 350 1 to your requirements 4 You are prompted to save the entries when you exit the parameterization interface Confirm with OK ...

Page 38: ...Programming FM 350 1 4 2 Starting Parameterization Interfaces FM 350 1 Counter module 38 Manual 05 2011 A5E03648639 01 ...

Page 39: ... you Table 5 1 Blocks that are described in this chapter Block number Block name Meaning FC 2 CNT_CTL1 Controlling of the FM 350 1 FC 3 CNT_CTL2 Controlling of the FM 350 1 only in isochronous mode FC 1 DIAG_INF Read Diagnostics data record 1 from the FM 350 1 Use of the blocks is illustrated in an example program The example program shows block calls and contains the necessary data block You can ...

Page 40: ...commands Mixed operation is not permitted Table 5 2 Possibilities of accessing the control and feedback interface Standard FC Load and transfer commands Control interface Write with FC CNT_CTL1 FC CNT_CTL2 Transfer command e g T PAD Feedback interface Read with FC CNT_CTL1 FC CNT_CTL2 Load command e g L PED The figure illustrates the data exchange on the basis of standard FCs DWD 3URJUDP RPPDQGV 0...

Page 41: ...e You can enter the address automatically in the DB by selecting the module in HW Config and then selecting a data block from the Properties dialog box by clicking on the Mod Addr button Channel address The channel address is the same as the module address in pointer format User data length The user data length amounts to 16 You can save these data by means of a parameter assignment screen refer t...

Page 42: ... L P 512 0 Module address in pointer format T CNT_CHAN1 CH_ADR Transfer of the channel address L 16 User data length 16 T CNT_CHAN1 U_D_LGTH Transfer of the user data length Call The CNT_CTL1 function can be called in the cycle or alternatively in a time controlled or isochronous interrupt OB Calling in an event driven interrupt program is not permitted The CNT_CTL1 function call in the STL and LA...

Page 43: ...tory loading of a counter sets L_DIRECT 2 IN OUT BOOL Measuring Must NOT be set polls and resets Counting Trigger bit for preparatory loading of a counter L_PREPAR 2 IN OUT BOOL Measuring Transfer of the low limit sets polls and resets Counting Transfer Comparison value 1 trigger bit T_CMP_V1 2 IN OUT BOOL Measuring Transfer of the high limit sets polls and resets Counting Transfer Comparison valu...

Page 44: ... for Transferring Values Operating mode Function parameter Counting L_DIRECT L_PREPAR T_CMP_V1 T_CMP_V2 C_DOPARA Measuring L_PREPAR T_CMP_V1 T_CMP_V2 C_DOPARA You can transfer several values at the same time Table 5 5 Simultaneous transfer of several values In the operating mode You can transfer at the same time Counting Load value Comparison value 1 Comparison value 2 DB parameter LOAD_VAL DB par...

Page 45: ...14 to 17 has two meanings If you set function parameter L_DIRECT or L_PREPAR LOAD_VAL is interpreted as a load value If you set function parameter C_DOPARA you can use Byte 14 to define the behavior of outputs DO0 and DO1 Bytes 15 and 16 are interpreted as hysteresis and pulse duration Table 5 7 Parameters for Transferring Values in the DB Count Modes DB address Parameters Meaning 14 0 LOAD_VAL Lo...

Page 46: ...x 1 1 0 Switch to comparison values x irrelevant 15 0 Hysteresis range of values 0 to 255 16 0 Pulse duration value range 0 to 250 17 0 Reserve 0 18 0 CMP_V1 Comparison value 1 load with function parameter T_CMP_V1 22 0 CMP_V2 Comparison value 2 load with function parameter T_CMP_V2 Parameters for Transferring Values in the DB Measuring Modes The following table shows the range of the DB in which ...

Page 47: ...0 LOAD_VAL Reserve 0 18 0 CMP_V1 High limit Load with function parameter T_CMP_V1 22 0 CMP_V2 Update time Load with function parameter T_CMP_V2 Startup characteristics As soon as the CNT_CTL1 function detects a startup CPU start or FM start any pending job is deferred and the startup is acknowledged first Any job you have already initiated is carried out once the startup is finished and is therefo...

Page 48: ...P cycle whereas FC CNT_CTL2 supports initiation at every second PROFIBUS DP cycle The block is ready to execute a job when the corresponding init bit 0 Completion of a job is not indicated separately Any communication problems or data errors or operator errors can thus not be allocated to a particular job In such situations the block will interrupt job processing and generate an operator error 90 ...

Page 49: ...as been executed the function resets init parameter IN_DIAG and reports completion of the transfer Manual 2 contains a detailed description of SFC RDSYSST Call FC DIAG_INF can be called within the cycle and in the interrupt program There is no point in calling it in the time controlled program The call of FC DIAG_INF is demonstrated below in STL and LAD format B 1 B12 5 7B9 1B B 1 1 12 B12 5 7B9 1...

Page 50: ...ALL CNT_CTL1 FC call with the DB 1 DB_NO 1 Channel 1 SW_GATE SW_GATE Control software gate GATE_STP GATE_STP Stop gate OT_ERR_A CON_OT_ERR Acknowledge operator error SET_DO0 SET_DO0 Set Output DO0 SET_DO1 SET_DO1 Set Output DO1 OT_ERR OT_ERR Operator error occurred L_DIRECT L_DIRECT Load new counter value L_PREPAR L_PREPAR Prepare new counter value T_CMP_V1 T_CMP_V1 Load new Comparison value 1 T_C...

Page 51: ...e word TRIGGER M 10 0 Trigger memory marker formed as a result of the technological requirement SW_GATE M 20 0 Start counter GATE_STP M 20 1 Close counter gate OT_ERR_A M 20 2 Acknowledge operator error SET_DO0 M 20 3 Set output DO1 SET_DO1 M 20 4 Set output DO2 OT_ERR M 20 5 Operator error occurred L_DIRECT M 20 6 Direct and preparatory loading of counter value L_PREPAR M 20 7 Load value of count...

Page 52: ...only loaded in preparation you have to set the trigger bit L_PREPAR 1 in your user program The load value loaded in preparation is then applied at the next cause that sets the counter The FC must therefore be called until the FC has reset the selected trigger bit L_DIRECT or L_PREPAR The in out parameter remains set during the transfer The CNT_CTL1 function does not issue an error message with reg...

Page 53: ...F Block number FC 0 FC 2 FC 3 FC 1 Version 3 0 3 0 3 0 3 0 Assignment in work memory 540 bytes 894 bytes 1422 bytes 246 bytes Assignment in load memory 634 bytes 1062 bytes 1572 bytes 326 bytes Assignment in data area 70 bytes long data block that is specified when the FC is called Assignment in local data area 4 bytes 46 bytes 46 bytes 38 bytes System function called SFC 6 RD_INFO SFC 6 RD_INFO S...

Page 54: ...ne the LOAD_VAL parameter as load value You set the C_DOPARA bit in byte 0 to define the reaction of outputs DO0 and DO1 Bytes 1 and 2 define the hysteresis and pulse duration Table 5 12 Control interface for count modes outputs Offset to the start address Parameters Meaning Bytes 0 to 3 LOAD_VAL Load value direct and preparatory loading with bit L_DIRECT Load value preparatory loading with bit L_...

Page 55: ...eaching the comparison value of the down count pulse width x 1 1 0 Switch to Comparison Value x irrelevant Byte 1 Hysteresis range of values 0 to 255 Byte 2 Pulse duration range of values 0 to 250 Byte 3 Reserve 0 Bytes 4 to 7 CMP_V1 Comparison value 1 load with bit T_CMP_V1 Bytes 8 to 11 CMP_V2 Comparison value 2 load with bit T_CMP_V2 Byte 12 NEUSTQ OT_ERR_A Bit 7 Reserve 0 Bit 6 Restart acknowl...

Page 56: ...0 Byte 15 C_DOPARA 1 RES_ZERO RES_SYNC T_CMP_V2 2 T_CMP_V1 2 L_PREPAR 2 L_DIRECT 2 Bit 7 Reserve 0 Bit 6 Change function of DO0 DO1 hysteresis or pulse duration Bit 5 Status bits of zero transition overflow underflow and comparator Resetting Bit 4 Reset synchronization status bit Bit 3 Load comparison value 2 Bit 2 Load comparison value 1 Bit 1 Load counter in preparation Bit 0 Direct and preparat...

Page 57: ...this bit has been set FC CNT_CNTL1 sets the NEUSTQ bit when the return signal FM_NEUST is set and the return signal FM_NEUSTQ 0 FC CNT_CNTL1 resets the bit when FM 350 1 has reset the FM_NEUST bit and set the FM_NEUSTQ bit If you are not using FC CNT_CNTL1 the restart must be coordinated in the user program OT_ERR_A Set this bit to acknowledge an operator error For detailed information on operator...

Page 58: ...lue Bytes 8 to 9 DA_ERR_W Data error Byte 10 OT_ERR_B Operator error Byte 11 PARA FM_NEUST FM_NEUSTQ DATA_ERR OT_ERR DIAG Bit 7 Parameter assignment done Bit 6 Restart request Bit 5 Restart acknowledgement done Bit 4 Data error Bit 3 Operator error Bit 2 Diagnostics event Bit 1 Bit 0 Byte 12 Bit 7 Reserve 0 Bit 6 Reserve 0 Bit 5 Reserve 0 Bit 4 Reserve 0 Bit 3 Reserve 0 Bit 2 Reserve 0 Bit 1 Reser...

Page 59: ...us at digital input DI Stop Bit 2 Status at digital input DI Start Bit 1 New latch value for isochronous mode Bit 0 Status at digital input DI Set Byte 15 STS_C_DOPARA STS_RES_ZERO STS_RES_SYNC STS_T_CMP_V2 STS_T_CMP_V1 STS_L_PREPAR STS_L_DIRECT Bit 7 Reserve 0 Bit 6 Change function of DO0 DO1 hysteresis or pulse duration Bit 5 Status bit of zero transition overflow underflow or comparator Resetti...

Page 60: ...ors This bit will not be set however unless bit FM_NEUSTQ was reset From that moment on the values in the checkback interface are valid and up to date STS_C_DOPARA Bit used to acknowledge simultaneous changes of the reaction of DO0 and DO1 and of the hysteresis and pulse duration Transfer the old values if you want to discard all changes STS_CMP1 Status at output DO0 STS_CMP2 Status at output DO1 ...

Page 61: ...s lit STS_SET Status at digital input DI Set STS_STA Status at digital input DI Start STS_STP Status at digital input DI Stop STS_UFLW This bit indicates underflow The stored status is reset with RES_ZERO by acknowledging STS_SYNC This bit indicates the saved state which shows that the counter was loaded by an event at DI Set synchronization The saved status is reset with RES_SYNC by acknowledging...

Page 62: ... L_PREPAR Define reaction of DO0 at bit C_DOPARA Bits 2 to 7 Bit 1 Bit 0 Reaction of output DO0 Irrelevant 0 0 No comparison Irrelevant 0 1 Out of limits Irrelevant 1 0 Below the low limit Irrelevant 1 1 Above the high limit Byte 0 Byte 1 Reserve 0 Byte 2 Reserve 0 Byte 3 LOAD_VAL Reserve 0 Bytes 4 to 7 CMP_V1 High limit load with bit T_CMP_V1 Bytes 8 to 9 CMP_V2 Update time load with bit T_CMP_V2...

Page 63: ...rve 0 Bit 3 Control bit DO1 Bit 2 Control bit DO0 Bit 1 Enable DO1 Bit 0 Enable DO0 Byte 15 C_DOPARA 1 RES_ZERO T_CMP_V2 2 T_CMP_V1 2 L_PREPAR 2 Bit 7 Reserve 0 Bit 6 Change function DO0 Bit 5 Reset status bits of overflow underflow and end of measurement Bit 4 Reserve 0 Bit 3 Change update time Bit 2 Load high limit Bit 1 Load low limit Bit 0 1 Do not set this bit at the same time as bit 1 2 or 3...

Page 64: ...en the return signal FM_NEUST is set and the return signal FM_NEUSTQ 0 FC CNT_CNTL1 resets the bit when FM 350 1 has reset the FM_NEUST bit and set the FM_NEUSTQ bit If you are not using FC CNT_CNTL1 the restart must be coordinated in the user program OT_ERR_A Set this bit to acknowledge an operator error For detailed information on operator errors read the checkback interface before you acknowled...

Page 65: ...tes 8 to 9 DA_ERR_W Data error Byte 10 OT_ERR_B Operator error Byte 11 PARA FM_NEUST FM_NEUSTQ DATA_ERR OT_ERR DIAG Bit 7 Parameter assignment done Bit 6 Restart request Bit 5 Restart acknowledgement done Bit 4 Data error Bit 3 Operator error Bit 2 Diagnostics event Bit 1 Bit 0 Byte 12 Bit 7 Reserve 0 Bit 6 Reserve 0 Bit 5 Reserve 0 Bit 4 Reserve 0 Bit 3 Reserve 0 Bit 2 Reserve 0 Bit 1 Reserve 0 B...

Page 66: ...t 7 Bit 6 Bit 5 Status at output DO1 Bit 4 Status at output DO0 Bit 3 Status at digital input DI Stop Bit 2 Status at digital input DI Start Bit 1 Bit 0 Status at digital input DI Set Byte 15 STS_C_DOPARA STS_RES_ZERO STS_T_CMP_V2 STS_T_CMP_V1 STS_L_PREPAR Bit 7 Reserve 0 Bit 6 Change function DO0 Bit 5 Reset end of measurement status bit Bit 4 Bit 3 Change refresh time Bit 2 Load high limit Bit 1...

Page 67: ...t report any further operator errors PARA This bit will be set when the module parameters are free of errors The parameter data record on the module does not contain any errors This bit will not be set however unless bit FM_NEUSTQ was reset From this moment on the values in the checkback interface are valid and up to date STS_C_DOPARA Bit used to acknowledge simultaneous changes of the reaction of...

Page 68: ...user program W W RQWURO ELW KHFN EDFN ELW Figure 5 4 Complete Acknowledgement Principle The sequence is as follows 1 If the feedback bit 0 you can request processing via the user program by setting the control bit 2 The FM 350 1 detects the request acknowledges it by setting the feedback bit and starts the processing 3 Once the FM 350 1 has set the feedback bit you can reset the control bit 4 At t...

Page 69: ...5 20 Transferring the values depending on the operating mode Operating mode Control bits Counting L_DIRECT L_PREPAR T_CMP_V1 T_CMP_V2 C_DOPARA Measure L_PREPAR T_CMP_V1 T_CMP_V2 C_DOPARA The figure shows an example of the chronological sequence for the value transfer during initializing loading of the counter W W W W 27B 55 27B 55B B35 3 5 676B B35 3 5 2S HUURU ELW 2S HUURU DFNQRZOHGJHPHQW RQWURO ...

Page 70: ...fer it again Note If you use the control bits L_DIRECT L_PREPAR T_CMP_V1 or T_CMP_V2 to load the value LOAD_VAL CMP_V1 or CMP_V2 you cannot change the parameter assignments at the same time using the C_DOPARA control bit This would lead to an OT_ERR operator error that you would have to acknowledge with OT_ERR_A Time Required to Transfer Values Table 5 22 Time Required to Transfer Values Use of th...

Page 71: ...ate time Resetting the status bits With the FM 350 1 the status bits are also reset using the complete acknowledgement principle Table 5 24 Resetting the status bits depending on the operating mode Operating mode Status bits Counting STS_ZERO STS_OFLW STS_UFLW STS_COMP1 STS_COMP2 Measure STS_OFLW STS_UFLW STS_COMP1 The chronological sequence when resetting the status bits is shown in the figure W ...

Page 72: ...oordinate the restart in the user program Acknowledge the FM_NEUST bit by setting the NEUSTQ control bit FM 350 1 then resets acknowledgement bit FM_NEUST and sets acknowledgement bit FM_NEUSTQ You can reset control bit NEUSTQ after FM 350 1 has reset acknowledgement bit FM_NEUST The diagram shows the restart coordination sequence 0B1 867 1 8674 0B1 8674 W W W KHFN EDFN ELW WUO ELW KHFN EDFN ELW 5...

Page 73: ...et substitute values to the digital outputs The substitute values are retained after the CPU STOP RUN transition until the next time the digital outputs are used The outputs are reset when you change the Reaction to CPU STOP with new parameters The current measuring mode is cancelled and the outputs are reset Keep last value The current counting or measuring mode is cancelled The module outputs at...

Page 74: ...Programming the FM 350 1 5 8 Reaction to CPU STOP and CPU STOP to RUN FM 350 1 Counter module 74 Manual 05 2011 A5E03648639 01 ...

Page 75: ...1 75 Commissioning FM 350 1 6 Chapter overview This chapter contains the checklists for commissioning FM 350 1 Those checklists help you to check all working steps before you put the module into operation prevent faulty reactions of the module in runtime ...

Page 76: ...to position and tighten screw 3 Attach slot number 4 Install shield connecting element Select cables Observe the rules and specifications in the chapter Wiring front connectors Page 31 Connecting the 5 V encoder Incremental 5 V encoder with the differential signals A and A B and B N and N Connection 3 4 6 7 8 9 10 11 Name 1M 5 2 VDC AA A BB B NN N Function Encoder supply ground Encoder power suppl...

Page 77: ... V Encoder signal A Direction level B Wire digital inputs and digital outputs Digital inputs and digital outputs Connection 13 14 15 17 18 Name I0 I1 I2 Q0 Q1 Function Digital input DI Start Digital input DI Stop Digital input DI Set Digital output DO0 Digital output DO1 Connecting the auxiliary voltage and the load voltage Auxiliary voltage and load voltage Connection 1 2 19 20 Name 1L 1M 2L 2M F...

Page 78: ...4 V encoder with asymmetrical signals Encoder inputs Sourcing output push pull 200 kHz 2 5 μs Max count frequency 20 kHz 25 μs Sinking output 24 V encoders with pulse train and direction signal Encoder inputs Sourcing output push pull 200 kHz 2 5 μs Max count frequency 20 kHz 25 μs Sinking output 24 V initiator Encoder inputs Sourcing output push pull Internal 1 MHz time base Single Double Signal ...

Page 79: ... gate Edge controlled hardware gate 2 5 μs Minimum pulse width 25 μs Single Setting the counter Multiple Evaluate zero mark for setting Determine the behavior of the digital outputs Pulse duration 0 to 500 ms Hysteresis 0 to 255 Inactive Active from Comparison value 1 to overflow Active from Comparison value 1 to underflow Active on reaching Comparison value 1 for pulse duration up down Active on ...

Page 80: ...nterrupt on closing the gate hardware or software gate Interrupt in case of overflow Interrupt in event of underflow Interrupt in case of zero crossing Interrupt on reaching Comparison value 1 in up direction Interrupt on reaching Comparison value 1 in down direction Interrupt on reaching Comparison value 2 in up direction Interrupt on reaching Comparison value 2 in down direction Interrupt on set...

Page 81: ...Sinking output 24 V encoder with asymmetrical signals Encoder inputs Sourcing output push pull 200 kHz 2 5 μs Max count frequency 20 kHz 25 μs Sinking output 24 V encoder with pulse train and direction signal Encoder inputs Sourcing output push pull Normal Count direction Inverted Set operating mode Frequency measurement Speed measurement Period measurement Update time Pulses per encoder revolutio...

Page 82: ... of limits Below the low limit Output DO0 Above the high limit Select interrupts Interrupt on opening the gate hardware or software gate Interrupt on closing the gate hardware or software gate Interrupt on violation low limit Interrupt on violation high limit Configuring FM 350 1 in HW Config Interrupt at end of measurement Enable digital outputs CTRL_DO0 in DB CTRL_DO1 in DB Determine load value ...

Page 83: ...e Manual 05 2011 A5E03648639 01 83 Operating Modes parameters and commands 7 Chapter overview Contents of this chapter A description of the operating modes A description of the commands Conditions and information to observe ...

Page 84: ... hardware signals wired to the front connector or by setting the relevant input parameter at FC CNT_CTL1 or with isochronous mode FC CNT_CLT2 in the user program The input parameters are stored as control bits in the DB of FC CNT_CTL1 Control and status bits in the DB In addition to the control bits the DB contains status bits which report the status of count and measuring operations The control a...

Page 85: ... All control signals transferred to FM 350 1 are activated at the time To within the same PROFIBUS DP cycle All values and FM 350 1 status bits recorded at the time Ti are made available at the checkback interface within the same PROFIBUS DP cycle All 16 bytes of the checkback interface are consistent when operating in isochronous mode i e the values and status bits always match The counter value ...

Page 86: ...able 7 1 Count modes of FM 350 1 Designation Description Continuous count with or without SW or HW gate FM 350 1 performs a continuous count starting at the current counter value Single count with SW or HW gate When the gate opens FM 350 1 starts the count at the load value and stops at the count limit Cyclic count with SW or HW gate FM 350 1 starts counting in the range between the load value and...

Page 87: ...nt direction down In all counting modes The counting process is started by the canceling SW or HW gate the load value is not accepted when the counting continues Synchronization Latch retrigger Gate control You can use the hardware gate HW gate and software gate SW gate to control the FM 350 1 counting processes meaning to start and stop them Maximum Count Range without Main Count Direction The 32...

Page 88: ...t values Value Main count direction Start value Load value None Up Down 0 0 Parameterized high count limit Count value None Up Down 0 0 Parameterized high count limit Comparison value 1 and 2 None Up Down 0 0 Parameterized high count limit Latch value None Up Down 0 0 Parameterized high count limit Isochronous Mode In isochronous mode the FM 350 1 accepts control bits and control values from the c...

Page 89: ...close gate The counting process starts when a gate opens and ends when it closes Setting the counter The counter can be set to the load value using various signals Latch retrigger Saves the counter level and loads the counter with the load value in response to a positive edge at DI Start Latch Saves the counter level in response to a positive edge at DI Start Measure times between two edges Measur...

Page 90: ...h limit and continues to count from there without any pulse losses The following applies to the 31 bit count range The high count limit is set to 2 147 483 647 231 1 The low count limit is set to 2 147 483 648 231 The following applies to the 32 bit count range The high count limit is set to 4 294 967 295 232 1 The low count limit is set to 0 zero Behavior at the Count Limits If the counter reache...

Page 91: ...tion Is initiated by Open software gate Setting SW_GATE Close software gate Resetting SW_GATE When the software gate opens the counting operation resumes with the current counter level Opening and Closing the Hardware Gate You open and close the hardware gate by applying the relevant signals to or removing the signals from the digital inputs DI Start and DI Stop Table 7 7 Triggering the Opening Cl...

Page 92: ...also terminate the count when counting with the software gate or hardware gate by using the gate stop function Set the GATE_STP input parameter of FC_CNT_CTL1 for this Effects of the Latch Setting on the Counter at the Beginning of a Count Operation You can find information on this in the section command Latch retrigger Page 127 and command Latch Page 130 in this section ...

Page 93: ...t direction when the gate is opened the FM 350 1 counts up or down from the load value until one of the count limits is exceeded When one of the count limits is exceeded the following occurs The gate is closed The STS_OFLW or STS_UFLW bit in the feedback interface is set The counter is loaded to the other count limit The count limits are fixed at the maximum count range The STS_ZERO bit is set if ...

Page 94: ... high count limit is exceeded the following occurs The gate is closed The STS_OFLW bit in the feedback interface is set The counter is loaded with the load value The high count limit can be set The load value has a starting count and can be changed You must open the gate again to restart the counting 676B2 6HW XSSHU FRXQW OLPLW RDG YDOXH RZHU FRXQW OLPLW 6HW FRXQW UDQJH RXQWHU OHYHO DWH VWDUW DWH ...

Page 95: ...The low count limit is 0 The load value has a starting count and can be changed You must open the gate again to restart the counting 676B8 6HW XSSHU FRXQW OLPLW RDG YDOXH RZHU FRXQW OLPLW 6HW FRXQW UDQJH RXQWHU OHYHO DWH VWDUW DWH VWDUW XWRPDWLF JDWH VWRS XWRPDWLF JDWH VWRS 7LPH Figure 7 4 Single counting with main count direction down canceling gate function Selecting the Gate Function You can se...

Page 96: ...tive pulse edge across digital input DI Stop With a level controlled hardware gate the renewed opening of the gate and setting of the counter to the load value is performed by a signal across DI Start If a positive pulse edge is reapplied across DI Start in the case of an edge controlled hardware gate the counter will again start counting from the load value irrespective of whether the gate is clo...

Page 97: ...nt modes FM 350 1 Counter module Manual 05 2011 A5E03648639 01 97 Terminating the Count with the Gate Stop Function You can also terminate the count at any time with the gate stop function Set the GATE_STP input parameter of the FC_CNT_CTL1 for this ...

Page 98: ...ain count direction when the gate is opened the FM 350 1 counts up or down from the load value until one of the count limits is exceeded If one of the count limits is exceeded the following occurs The STS_OFLW or STS_UFLW bit in the feedback interface is set The counter is set to the load value from which it resumes counting The count limits are fixed at the maximum count range The STS_ZERO bit is...

Page 99: ...count limit is exceeded If the high count limit is exceeded the following occurs The STS_OFLW bit in the feedback interface is set The counter is set to the load value from which it resumes counting The high count limit can be set The load value has a starting count and can be changed The counting is continued until the gate is closed 6HW XSSHU FRXQW OLPLW RXQWHU OHYHO 676B2 6HW FRXQW UDQJH RZHU F...

Page 100: ... the load value from which it resumes counting The low count limit is 0 The load value has a starting count and can be changed The counting is continued until the gate is closed 676B8 6HW XSSHU FRXQW OLPLW RXQWHU OHYHO 6HW FRXQW UDQJH RZHU FRXQW OLPLW RDG YDOXH DWH VWDUW DWH VWRS 7LPH Figure 7 8 Periodic Counting With Main Count Direction Down Selecting the Gate Function You can select the gate co...

Page 101: ...o and from digital inputs DI Start and DI Stop Table 7 12 Triggering the Opening Closing of a HW Gate Periodic Counting Action Is initiated by Open hardware gate level controlled Apply signal to digital input DI Start Open hardware gate edge controlled Apply positive pulse edge across digital input DI Start Close hardware gate level controlled Remove signal from digital input DI Start Close hardwa...

Page 102: ...w count limit when counting with main count direction down and another pulse then comes the counter is set to the load value from which it resumes counting An appropriate status bit is set in the DB Table 7 13 Behavior at the Count Limits Periodic Counting Count limit reached Status bit in DB High count limit STS_OFLW is set Low count limit STS_UFLW is set Terminating the Count with the Gate Stop ...

Page 103: ...FFFFH When the counter status changes from 4 294 967 295 to 0 When the counter status changes from 0 to 4 294 967 295 31 to 31 bit 2 147 483 648 to 2 147 483 647 8000 0000H to 7FFF FFFFH When the counter status changes from 2 147 483 647 to 2 147 483 648 When the counter status changes from 2 147 483 648 to 2 147 483 647 In this count range you can only specify and evaluate hexadecimal values Over...

Page 104: ...nd closing of the HW gate 6WDUW RXQW SXOVHV 2SHQ JDWH ORVH JDWH RXQWHU VWDWXV Figure 7 10 Level triggered opening and closing of the HW gate The transfer of count pulses to the counter is always enabled as long as digital input DI Start is set A reset at digital input DI Start closes the gate The counter stops and ignores any further count pulses If the gate was closed as a result of overflow or u...

Page 105: ...s closed When digital input DI Stop is set a positive edge at digital input DI Start can not open the gate Status at the inputs DI Start and DI Stop The status at inputs DI Start and DI Stop is returned at the green LEDs I0 and I1 and in the user program at the STS_STA and STS_STP bits in the DB of FC CNT_CTL1 Gate status The gate status is indicated by the STS_GATE bit in the user program Opening...

Page 106: ...he count stop when the gate closes and is restarted at the load value when the gate is retriggered time in the figure below RXQWHU OHYHO LJK FRXQW OLPLW RDG YDOXH RZ FRXQW OLPLW DWH VWDUW DWH VWDUW DWH VWRS 7LPH Figure 7 13 Continuous down count canceling gate function When the interrupting gate function is active the count stops when the gate closes and resumes at the last actual count value when...

Page 107: ...ting a positive edge at digital input DI Start HW gate or you once again set input parameter SW_GATE Gate control in isochronous mode SW gate control To control the SW gate you set and reset the SW_GATE control bit in the user program After the control bit has changed the count starts and ends at time To in the next PROFIBUS DP cycle 7 3 7R 7R 7R 7R 7R 7L 676B 7 6 B 7 7 3 7 3 7 3 7 3 7L 7L 7L 7L 3...

Page 108: ... 7L 7L 7 3 7 3 7 3 7 3 3URYLVLRQ RI DFWXDO FRXQW YDOXH 3URYLVLRQ RI WKH FRXQW YDOXH WKDW ZDV YDOLG DW WKH HQG RI WKH FRXQW RXQW JDWH 3 F FOH 3 F FOH 3 F FOH 3 F FOH 3 F FOH Figure 7 16 Starting and stopping the count using the HW gate HW_GATE Hardware interrupt Opening and closing of a HW or SW gate can be used to trigger a hardware interrupt see the chapter Triggering hardware interrupts Page 156...

Page 109: ...he comparison values must be within the limits of the selected count range The comparison value is interpreted according to the selected count range If you give FFFF FFFF H for example as the comparison value the value is interpreted as 4 294 967 295 within the 0 to 32 bit count range and as 1 within the 31 to 31 bit count range Table 7 16 Permissible Range of Values for Comparison Values Main cou...

Page 110: ...Outputs 8QGHUIORZ RPSDULVRQ YDOXH 2YHUIORZ Inactive The output remains deactivated and is not affected by the comparison value zero crossing overflow or underflow events The output DOx may be used purely as a digital output When enabled it can be set and reset with the SET_DOx bit 8QGHUIORZ RPSDULVRQ YDOXH 2YHUIORZ Active from comparison value to overflow The output is set to 1 if the counter is i...

Page 111: ...hile counting down This requires either No main count direction Main count direction down W W 8QGHUIORZ RPSDULVRQ YDOXH 2YHUIORZ 2YHUIORZ 8QGHUIORZ RPSDULVRQ YDOXH 8S RZQ Active on reaching the comparison value for pulse duration up down The output is set to 1 for the period of the pulse duration regardless of the counting direction when the counter reaches the comparison value while counting down...

Page 112: ... 1 1 Is lit Table 7 21 Output DO1 Comparison condition Enable bit CTRL_DO1 Status bit STS_COMP2 Status bit STS_CMP2 Output DO1 LED DO1 0 0 0 Out Not fulfilled 1 0 0 Out 0 1 0 Out Fulfilled 1 1 1 Is lit Status bits STS_CMP1 and STS_CMP2 indicate the current status of outputs DO0 and DO1 If enabled they are set by CTRL_DO0 and CTRL_DO1 if a comparison condition is fulfilled and are reset if the cond...

Page 113: ..._V1 and CMP_V2 DO1 is activated if DO1 is deactivated if CMP_V1 CMP_V2 CMP_V1 Counter level CMP_V2 Counter level CMP_V1 or Counter level CMP_V2 CMP_V1 CMP_V2 CMP_V1 Counter level CMP_V2 CMP_V1 Counter level CMP_V2 CMP_V1 CMP_V2 Counter level CMP_V2 or Counter level CMP_V1 CMP_V2 Counter level CMP_V1 The result of the comparison is indicated by the status bit STS_COMP2 You cannot acknowledge and th...

Page 114: ... active in both counting directions The pulse duration starts when the output is set The pulse duration inaccuracy is less than 1 ms You can specify a value between 0 and 500 ms for the pulse duration This value applies to both outputs together If the pulse duration 0 ms the output is set when the comparison value is reached and is reset at the next count pulse The default value for the pulse dura...

Page 115: ...at the outputs are lost If the counter status reaches the relevant comparison value again while the output is still active no new pulse is initiated A further pulse can only be initiated when the output is no longer active You want to parameterize an output Active from comparison value to overflow you must not enable a hardware interrupt on Reaching the relevant comparison value up down You want t...

Page 116: ...ous mode the outputs DO0 and DO1 switch immediately after the comparison conditions are fulfilled and are thus independent of the PROFIBUS DP cycle Exception If you have set the behavior of the digital outputs to inactive and after enabling with CTRL_DO0 or CTRL_DO1 you activate the outputs with the control signal SET_DO0 or SET_DO1 the outputs are set and reset at the time To ...

Page 117: ...0 1 The hysteresis has no effect switched off The output reacts to the slightest change in the counter value 2 Hysteresis value n 255 The hysteresis takes effect The output does not react until the counter value is offset by n units to the comparison value The hysteresis applies to both overflow and underflow Function principle of the hysteresis when Active within the range between the comparison ...

Page 118: ... 5 RXQW YDOXH RPSDULVRQ YDOXH VWHUHVLV UDQJH VKDGHG JUD 2XWSXW IRU K VWHUHVLV 2XWSXW IRU K VWHUHVLV Figure 7 20 Example showing the effect of the hysteresis Note If the counter value is equal to the comparison value and the hysteresis is active FM 350 1 resets the output when the count direction changes at the comparison value see the diagram below 2XWSXW IRU K VWHUHVLV RXQW YDOXH RPSDULVRQ YDOXH ...

Page 119: ...is example No main count direction Active on reaching the comparison value for pulse duration up Pulse duration 0 The hysteresis is set when the comparison condition counter value 5 is fulfilled and a pulse of the assigned duration is output If the counter value leaves the hysteresis range the hysteresis ceases to be active FM 350 1 saves the count direction when hysteresis is activated A pulse is...

Page 120: ...rpreted as 4 294 967 295 within the count range from 0 to 32 bit and as 1 within the count range from 31 to 31 bit Enter the load value in the DB of the CNT_CTL1 function and transfer it with the CNT_CTL1 function to the module The counter is then set to the load value Directly and in preparation if input parameter L_DIRECT is set In preparation only if input parameter L_PREPAR is set The followin...

Page 121: ... at a specific point in your process Hence you achieve greater precision in the count process The counter is set independently of the Count mode After the counter has been set with an external signal bit STS_SYNC in the DB is set The STS_SYNC bit is cleared by the RES_SYNC bit Note The synchronization of a counter with the zero mark only makes sense if the gate is open If you have only enabled one...

Page 122: ... only set in the case of up counting ENSET_DN set The counter is only set in the case of down counting ENSET_UP and ENSET_DN set The counter is set in the case of up and down counting Parameter assignment single setting of counter The counter is set only at the first rising edge at DI Set If the counter is to be set again you must first set ENSET_UP or ENSET_DN again The counter is then set again ...

Page 123: ... input DI Set will then result in the counter being set 16 7B83 6HW RXQW SXOVHV RXQWHU VHW RXQWHU VHW RXQWHU QRW VHW RXQWHU QRW VHW Figure 7 23 Single Setting with DI Set Multiple Setting with DI Set The following figure shows multiple setting of the counter with DI Set In the case represented here only ENSET_UP is set i e the counter is set during up counting With every rising pulse edge at digit...

Page 124: ... Set and Zero Mark Input parameters Behavior of the FM 350 1 ENSET_UP set The counter is only set in the case of up counting ENSET_DN set The counter is only set in the case of down counting ENSET_UP and ENSET_DN set The counter is set in the case of up and down counting Parameter assignment single setting of counter The counter is set only at the first rising edge of the zero mark If the counter ...

Page 125: ...With the first rising pulse edge of the zero mark the counter is set provided that ENSET_UP and DI Set are similarly set If you want to set the counter again you must first reset ENSET_UP and then set it again If DI Set is not set setting is performed with the first zero mark after DI Set has been set If DI Set is set setting is performed with the next zero mark 16 7B83 6HW RXQW SXOVHV HUR PDUN RX...

Page 126: ...UP is set i e the counter is set during up counting With every rising pulse edge of the zero mark the counter is set provided that ENSET_UP and DI Set are set 6HW 16 7B83 RXQW SXOVHV HUR PDUN RXQWHU VHW RXQWHU VHW RXQWHU VHW RXQWHU VHW RXQWHU QRW VHW RXQWHU QRW VHW Figure 7 26 Multiple Setting of the Counter with the Zero Mark Hardware interrupt Setting the counter with an external signal can be u...

Page 127: ...atching operation the counter will be initialized with the load value and resumes the count starting at the load value retrigger Requirement Set the SW gate to enable this command The minimum interval between latch edges is 1 ms Values may be lost if this edge interval is less than this time Selecting edge signals You can assign the following behavior Latch retrigger at the positive edge at DI Sta...

Page 128: ...ge at input DI Start starts the count at the load value The counter will be initialized with the load value at each further edge at input DI Start The latch value is always equivalent to the counter value at the time the edge trigger is generated The status at input DI Start is indicated at the STS_STA status bit in the DB The latch value is indicated at LATCH_LOAD in the DB 7 B673 6 B 7 6WDUW RXQ...

Page 129: ...gate and the count begins again with the load value However counting is terminated if you close the SW gate by executing GATE_STP of FC CNT_CTL1 The signal at input DI Start can thus no longer be used to save any counter values Hardware interrupt on latch retrigger commands A hardware interrupt may be triggered each time a counter values is saved by executing the latch retrigger command As a conse...

Page 130: ...es at digital input DI Start This operation does not change the counter value Requirement Set the SW gate to enable this command The minimum interval between latch edges is 1 ms Values may be lost if this edge interval is less than this time Selecting edge signals You can assign the following behavior Latching at a positive edge at DI Start Latching at a negative edge at DI Start Latching at both ...

Page 131: ...n the SW gate has opened The counter starts at the load value The latch value is always equivalent to the counter value at the time the edge trigger is generated The status at input DI Start is indicated at the STS_STA status bit in the DB The latch value is indicated at LATCH_LOAD in the DB 6 B 7 7 B673 6WDUW RXQW SXOVHV RXQWHU OHYHO DWFK YDOXH Figure 7 28 Latch when load value 0 and positive edg...

Page 132: ...ut DI Start with a closed software gate and the count does not change However counting is terminated if you close the SW gate by executing GATE_STP of FC CNT_CTL1 DI Start can then no longer be used to save any counter values Hardware interrupt on latching A hardware interrupt may be triggered each time a counter value is saved by latching As a consequence you may need to increase the interval bet...

Page 133: ...te Control set Latch Retrigger For Encoder set Internal time Base 1 MHz Selecting the Edges Table 7 28 Selecting the Edges for the Time Measuring To measure the time between two immediately successive Parameterize Rising edges at DI Start Latch with positive edge Falling edges at DI Start Latch with negative edge Any edges at DI Start Latch with both edges Mode of operation The FM 350 1 uses an in...

Page 134: ...y FM 350 1 Name Description Frequency measurement FM 350 1 counts the pulses received within a dynamic measuring time Speed measurement FM 350 1 counts pulses received from a tacho generator within a dynamic measuring time and calculates the velocity based on this value and the number of pulses per encoder revolution Period measurement FM 350 1 indicates the dynamic measuring time as a period If t...

Page 135: ...g time time value of the last pulse in the current update interval minus time value of the last pulse in the previous update interval If no pulses are received within the next update intervals after the dynamic measuring time is calculated the measuring time is extended by these update intervals Any 1 pulse per dynamic measuring time value less than the last measured is output as the new value 8SG...

Page 136: ...the pulse sequence to measure The first measured value can not be calculated until the second pulse was received On each expiration of the update time a measured value is output at the checkback interface frequency period or rpm The end of a measurement is reported at the STS_COMP1 status bit This bit is reset by the RES_ZERO and STS_RES_ZERO bits according to the acknowledgement principle If the ...

Page 137: ...er module Manual 05 2011 A5E03648639 01 137 The diagram below shows the principle of continuous measurement based on the example of a frequency measurement DWH 3XOVH WUDLQ 0HDVXUHG YDOXH 8SGDWH WLPH Figure 7 30 Principle of continuous measurement example frequency measurement ...

Page 138: ...STS_OFLW 1 A hardware interrupt may also be generated 676B2 676B8 RZHU OLPLW 8SSHU OLPLW 0HDVXUHG YDOXH Figure 7 31 Limit monitoring in measuring mode Reset the STS_OFLW and STS_UFLW bits by setting the RES_ZERO and STS_RES_ZERO bits according to the acknowledgement principle The module sets the status bits again if it detects overflow of the measured value after the acknowledgement bits were set ...

Page 139: ...ue and the status bits at time Ti in each PROFIBUS DP cycle Each measurement starts and ends at the time Ti Note As you need to define the update time as an integer multiple of 10 ms for operation in non isochronous mode and in integer multiples of the PROFIBUS DP cycle time for operation in isochronous mode you should also adapt the update time parameter when you toggle these modes in order to re...

Page 140: ...VXUHPHQW QG RI IUHTXHQF PHDVXUHPHQW Figure 7 32 Frequency Measurement With Gate Function Update Time The FM 350 1 updates the measured values cyclically You specify the update time with the Update time parameter You can change the update time during operation Table 7 32 Calculating the Update Time Value range of n Boundary conditions Update time nmin nmax Non isochronous mode Any TDP n 10 ms 1 100...

Page 141: ...ges and Errors Frequency fmin Absolute error Frequency fmin Absolute error 0 1 Hz 0 001 Hz 1 000 Hz 0 18 Hz 1 Hz 0 001 Hz 10 000 Hz 1 8 Hz 10 Hz 0 003 Hz 100 000 Hz 18 Hz 100 Hz 0 02 Hz 500 000 Hz 90 Hz Function of the DI Start and DI Stop Digital Inputs You can choose between the following functions for the digital inputs Level controlled hardware gate Edge controlled hardware gate See section Co...

Page 142: ...03648639 01 Variable Values during Operation Low limit L_PREPAR High limit T_CMP_V1 Update time T_CMP_V2 Function of digital output DO0 C_DOPARA See the sections Behavior of the Digital Outputs Page 153 Control interface for the measuring modes Page 62 and Checkback interface for the measuring modes Page 65 ...

Page 143: ... RXQW SXOVHV QWHUQDO JDWH 6WDUW RI 530 PHDVXUHPHQW QG RI 530 PHDVXUHPHQW Figure 7 33 RPM Measurement with Gate Function Update Time The FM 350 1 updates the measured values cyclically You enable the update time by means of the Update time parameter You can change the update time during operation Table 7 35 Calculating the Update Time Value range of n Boundary conditions Update time nmin nmax Non i...

Page 144: ...Speed nmin Absolute error Speed nmin Absolute error 1 min 0 04 min 1 000 min 0 21 min 10 min 0 04 min 10 000 min 1 82 min 100 min 0 05 min 25 000 min 4 5 min Function of the DI Start and DI Stop Digital Inputs You can choose between the following functions for the digital inputs Level controlled hardware gate Edge controlled hardware gate See Chapter Command Open and close gate Page 149 Function o...

Page 145: ...39 01 145 Variable Values during Operation Lower limit L_PREPAR Upper limit T_CMP_V1 Update time T_CMP_V2 Function of digital output DO0 C_DOPARA See the sections Behavior of the Digital Outputs Page 153 Control interface for the measuring modes Page 62 and Checkback interface for the measuring modes Page 65 ...

Page 146: ...QXRXV SHULRGLF PHDVXUHPHQW QG RI FRQWLQXRXV SHULRGLF PHDVXUHPHQW 3HULRG Figure 7 34 Period Measurement with Gate Function Update Time The FM 350 1 updates the measured values cyclically You specify the update time with the Update time parameter You can change the update time during operation Table 7 38 Calculating the Update Time Value range of n Boundary conditions Update time nmin nmax Non isoch...

Page 147: ...rrors at a Resolution of 1 µs Resolution 1 µs Period Tmin Absolute error Period Tmin Absolute error 1 μs 10 0 1 μs 100 000 10 1 μs 100 0 1 μs 1 000 000 100 1 μs 1 000 0 1 μs 10 000 000 1 002 1 μs 10 000 1 1 μs 100 000 000 10 020 Table 7 42 Period Measurement Measuring Ranges and Errors at a Resolution of 1 16 µs Resolution 1 16 µs Period Tmin Absolute error Period Tmin Absolute error 1 16 μs 160 1...

Page 148: ...ue monitoring Measured value outside limits Measured value under low limit Measured value above high limit See the section Behavior of the Digital Outputs Page 153 Variable Values during Operation Low limit L_PREPAR High limit T_CMP_V1 Update time T_CMP_V2 Function of digital output DO0 C_DOPARA See the sections Behavior of the Digital Outputs Page 153 Control interface for the measuring modes Pag...

Page 149: ...d opening and closing of the HW gate 6WDUW 2SHQLQJ RI WKH JDWH ORVLQJ RI WKH JDWH 0HDVXUHPHQW 3XOVHV Figure 7 35 Level triggered opening and closing of the HW gate measuring You open the HW gate to start the measurement by setting a signal at digital input DI Start You close the HW gate to stop the measurement by resetting the signal at digital input DI Start The measured value which is valid at t...

Page 150: ...ng a positive edge at digital input DI Stop The measured value which is valid at the time the HW gate is closed is retained at the checkback interface If a positive edges is set in parallel at both inputs an open gate will be closed whereas a closed gate remains closed When digital input DI Stop is set a positive edge at digital input DI Start can not open the gate Status at the inputs DI Start an...

Page 151: ...er SW_GATE once again Edge triggered opening and closing of the SW gate is not supported SW gate status The status of the SW gate is indicated at the STS_SW_G bit in the DB of FC CNT_CTL1 Stopping measurements using the gate stop function You can also use the gate stop function to stop a measurement irrespective of any signal or software gate states This is done by setting input parameter GATE_STP...

Page 152: ...XUHG YDOXH 3URYLVLRQ RI WKH PHDVXUHG YDOXH WKDW ZDV YDOLG DW WKH HQG RI WKH PHDVXUHPHQW 0HDVXUHPHQW 3 F FOH 3 F FOH 3 F FOH 3 F FOH 3 F FOH Figure 7 38 Starting and stopping a measurement using the SW gate SW_GATE HW gate control You control a measurement using the HW gate by opening the HW gate to start the operation and immediately stop the measurement at the time Ti by closing the HW gate 676B ...

Page 153: ...tivated when digital output DO0 is exceeded You can set these limit values and modify them via the load function You can use digital output DO1 as a normal digital output Enabling the Outputs Before you can activate the outputs you must first enable them by setting the appropriate bits in the DB see the chapter DB assignments Page 169 When you reset one of these bits the associated output is switc...

Page 154: ...igital output and set and reset it with the control signal SET_DO0 if you have enabled it with the control signal CTRL_DO0 To point in time To Immediately after setting or resetting the output Out of limits DO0 is set in both of the following cases Measured value Lower limit Measured value Upper limit Below the low limit DO0 is set if Measured value Lower limit Above the high limit DO0 is set if M...

Page 155: ...wo outputs is indicated by the green LEDs and the corresponding status bits in the DB Table 7 45 Output DO0 Limit values Enable bit CTRL_DO0 Status bit STS_CMP1 Output DO0 LED DO0 0 0 Out Not exceeded 1 0 Out 0 0 Out Exceeded 1 1 is lit Table 7 46 Output DO1 Control bit SET_DO1 Enable bit CTRL_DO1 Status bit STS_CMP2 Output DO1 LED DO1 0 0 Out 0 1 0 Out 0 0 Out 1 1 1 is lit ...

Page 156: ...events can initiate a hardware interrupt during operation of the FM 350 1 Counter modes Opening of the gate in the operating modes with hardware or software gate Closing of the gate in the operating modes with hardware or software gate Overflow Underflow Zero pass Reaching Comparison value 1 or 2 in the up direction Reaching Comparison value 1 or 2 in the down direction Setting the counter with an...

Page 157: ... Information The temporary variable OB40_POINT_ADDR is written in the start information of OB 40 The variable OB40_POINT_ADDR Bytes 8 to 11 consists of four bytes The information about the event that has initiated the hardware interrupt is entered in Bytes 8 and 9 The table shows which bits are set for which interrupt All unlisted bits are not significant and are set to zero Table 7 47 Assignment ...

Page 158: ...an event occurs that is to initiate a hardware interrupt and the same previous event has not yet been acknowledged no further hardware interrupt is initiated the hardware interrupt is lost This may lead to the Hardware interrupt lost diagnostic interrupt depending on the parameterization Default setting No hardware interrupt is parameterized in the default setting ...

Page 159: ...apter overview This chapter describes which encoders you can connect to the counter module the time profile of the encoder signals the multiple evaluation of encoder signals by the counter module how the module monitors the various encoder signals which signals can be assigned input filter parameters ...

Page 160: ...pulse amplitude and number of signals Pulse generators such as light barriers or proximity switches BEROs return only a rectangular signal at a specific amplitude Connecting different encoders The counter module supports different encoders which return pulses for the count signals The table shows these encoders and the corresponding signals Table 8 1 Encoders which can be connected Encoders Signal...

Page 161: ...ize the counter with the load value if programmed accordingly Encoders featuring these six signals are symmetrical encoders The diagram shows the time profile of the encoder signals 6LJQDO 6LJQDO 6LJQDO 6LJQDO 6LJQDO 1 6LJQDO 1 LUHFWLRQ RI FRXQW 8S RZQ Figure 8 1 Signals of the 5 V incremental encoder The module detects the count direction by evaluating the ratio of signals A and B The diagrams in...

Page 162: ...used signal pairs if you have disabled the corresponding diagnostics functions in the program monitoring An error state at all three signals indicates a defective encoder or a short circuit at the 5 2 V DC encoder supply or a missing encoder When programming is completed and the module detects an error the error information will be written to the diagnostics data records DS0 and DS1 This situation...

Page 163: ...oders which do not return inverted signals asymmetrical encoders The diagram shows the time profile of the encoder signals 6LJQDO 6LJQDO 6LJQDO 1 8S RZQ Figure 8 2 Signals of the 24 V incremental encoder The module detects the count direction by evaluating the ratio of signals A and B The diagrams in the chapter Signal evaluation Page 166 show which edges of the A and B signals are incremented or ...

Page 164: ...resultant count pulses 6LJQDO 6LJQDO DV GLUHFWLRQ OHYHO 8S FRXQW SXOVHV RZQ FRXQW SXOVHV 8S RZQ Figure 8 3 Signals of a 24 V pulse generator with direction signal Programming the encoder inputs The count direction is defined by programming the encoder inputs The diagram shows a change of the count direction based on parameter settings Table 8 2 Count direction determined by input parameters Progra...

Page 165: ...he 24 V inputs A B and N and for the digital inputs Input filters available Table 8 3 Input filters Features Input filter 1 default Input filter 2 Typical input delay 1 µs 15 µs Maximum count frequency 200 kHz 20 kHz Minimum pulse width of count signals 2 5 µs 25 µs Monitoring encoder signals The 24 V count signals are not monitored to detect wire breaks or short circuits Coding plug only for FM 3...

Page 166: ... evaluation is only supported for 5 V incremental encoders which return the A and B signal with a phase shift of 90 for 24 V incremental 24 V encoders with a phase shift of 90 of the A and B signals Single evaluation In this mode the module evaluates only one edge of signal A Up count pulses are recorded at the positive edge at track A and if track B is low Down count pulses are recorded at the po...

Page 167: ...am shows the double evaluation of signals 6LJQDO 6LJQDO 8S FRXQW SXOVHV RZQ FRXQW SXOVHV RZQ 8S Figure 8 5 Double evaluation Quadruple evaluation Quadruple evaluation refers to the evaluation of the positive and negative edges of signals A and B The logic level at the signals A and B determines the count direction i e the up or down count pulse The diagram shows quadruple evaluation of signals 6LJ...

Page 168: ...Encoder signals and their evaluation 8 4 Signal evaluation FM 350 1 Counter module 168 Manual 05 2011 A5E03648639 01 ...

Page 169: ...hown below Table 9 1 DB assignments Address Variable Data type Start value Comment Count Measuring FC parameters addresses 0 0 AR1_BUFFER DWORD DW 16 0 AR1 buffer AR1 buffer 4 0 FP BYTE B 16 0 Flag byte Flag byte 5 0 RESERVED BYTE B 16 0 Reserved Reserved 6 0 MOD_ADR WORD W 16 0 Module address Module address 8 0 CH_ADR DWORD DW 16 0 Channel address Channel address 12 0 U_D_LGTH BYTE B 16 0 User da...

Page 170: ... FALSE Reserved Reserved 27 5 A_BIT1_5 BOOL FALSE Reserved Reserved 27 6 A_BIT1_6 BOOL FALSE Reserved Reserved 27 7 A_BIT1_7 BOOL FALSE Reserved Reserved 28 0 CTRL_DO01 BOOL FALSE Enable digital output DO0 write user Enable digital output DO0 write user 28 1 CTRL_DO11 BOOL FALSE Enable digital output DO1 write user Enable digital output DO1 write user 28 2 A_BIT2_2 BOOL FALSE Reserved Reserved 28 ...

Page 171: ... BOOL FALSE Data error bit read user Data error bit read user 41 5 E_BIT0_5 BOOL FALSE Reserved Reserved 41 6 E_BIT0_6 BOOL FALSE Reserved Reserved 41 7 PARA1 BOOL FALSE Module is programmed read user Module is programmed read user 42 0 E_BYTE_0 BYTE B 16 0 Reserved Reserved 43 0 STS_RUN1 BOOL FALSE Status counter running read user Status counter running read user 43 1 STS_DIR1 BOOL FALSE Status c...

Page 172: ...eserved 45 1 E_BIT3_1 BOOL FALSE Reserved Reserved 45 2 E_BIT3_2 BOOL FALSE Reserved Reserved 45 3 E_BIT3_3 BOOL FALSE Reserved Reserved 45 4 E_BIT3_4 BOOL FALSE Reserved Reserved 45 5 E_BIT3_5 BOOL FALSE Reserved Reserved 45 6 E_BIT3_6 BOOL FALSE Reserved Reserved 45 7 E_BIT3_7 BOOL FALSE Reserved Reserved FM 450 parameters 46 0 ACT_CMP1 DINT L 0 Reserved Reserved 50 0 ACT_CMP2 DINT L 0 Reserved ...

Page 173: ... 57 2 EPROM_FLT BOOL FALSE EPROM error EPROM error 57 3 RAM_FLT BOOL FALSE RAM error RAM error 57 4 ADU_FLT BOOL FALSE ADC error ADC error 57 5 FUSE_FLT BOOL FALSE Fuse Fuse 57 6 HW_INTR_FLT BOOL FALSE Hardware interrupt lost Hardware interrupt lost 57 7 RESERVED_3 BOOL FALSE Reserved Reserved 58 0 CH_TYPE BYTE B 16 0 Channel type Channel type 59 0 LGTH_DIA BYTE B 16 0 Length of diagnostics data p...

Page 174: ...6 BOOL FALSE DS1 byte 8 bit 6 DS1 byte 8 bit 6 62 7 D_BIT8_7 BOOL FALSE DS1 byte 8 bit 7 DS1 byte 8 bit 7 63 0 D_BYTE9 BYTE B 16 0 DS1 byte 9 DS1 byte 9 64 0 CH2_SIGA BOOL FALSE Reserved Reserved 64 1 CH2_SIGB BOOL FALSE Reserved Reserved 64 2 CH2_SIGZ BOOL FALSE Reserved Reserved 64 3 CH2_BETW BOOL FALSE Reserved Reserved 64 4 CH2_5V2 BOOL FALSE Reserved Reserved 64 5 D_BIT10_5 BOOL FALSE Reserve...

Page 175: ...errors which the module must indicate Error classes of the module Errors indicated by the group error LED to report internal and external module errors Errors which can trigger a diagnostics interrupt Operator errors These different error classes are indicated at different positions and must be acknowledged in different ways This chapter describes errors which may occur where these errors are indi...

Page 176: ... parameters and transfer Coding plug wrongly connected Correct the position of the coding plug Auxiliary voltage 1L 1M not connected or 24 VDC encoder supply short circuited Correct connection 5 2 VDC encoder supply short circuited or overloaded Correct connection Fault in 5 V encoder signals wirebreak short circuit cable missing Correct connection External errors Module parameterization does not ...

Page 177: ...meout RAM defective Hardware interrupt lost Signal A error wire break short circuit cable missing Signal B error wire break short circuit cable missing Signal N error wire break short circuit cable missing Enabling diagnostics interrupts You disable or enable interrupts at the module and define whether it should generate diagnostics and or a hardware interrupts using the programming interfaces Rea...

Page 178: ...reports a channel error Assignments of diagnostics data record DS0 in the start information The table shows the start information assignments of diagnostics data record DS0 Any bits not listed bits are insignificant and zero Table 10 2 Assignments of diagnostics data record DS0 Byte Bit Meaning Remarks Event ID 0 Module in error state Set upon all diagnostics events 8 x 00 1 Internal error Set at ...

Page 179: ...ble 10 3 Assignments of bits in bytes 4 to 11 of the diagnostics data record DS Byte Bit Meaning Remarks Event ID 0 6 Channel type Always assigned the value 76H 4 7 Further channel types Always assigned zero value 5 0 7 Diagnostics data length Always assigned the value 10H 6 0 7 Number of channels Always assigned the value 1 7 0 Channel error vector Assigned 1 on channel error 0 Signal A error 8 x...

Page 180: ...206 Reversal of direction not allowed 207 Incorrect configuration of the reaction of DO0 208 Incorrect configuration of the reaction of DO1 209 Pulse duration out of limits 211 Wrong operating mode selected 212 No gate or both gates defined 213 Faulty parameters of main count direction 214 Count high limit exceeded 215 A count direction other than set at the hardware interrupt parameter Reaching t...

Page 181: ...ershoot or comparison value 1 out of limits 223 Update time or comparison value 2 out of limits 224 Pulses per encoder revolution out of limits How to acknowledge data errors Correct the parameter values according to specifications Return the corrected parameter set to FM 350 1 The module once again checks the parameters and clears the data error in the DB ...

Page 182: ...ble 10 5 Operator error numbers and their meaning No Meaning 0 No error 1 Operating mode can not be started using the SW gate 2 Operating mode can not be canceled 4 Only allowed when the CPU is in STOP 5 Only the parameter assignment control bit may be set 6 Illegal job 10 Undershoot or load value out of limits 11 Overshoot or comparison value 1 out of limits 12 Update time or comparison value 2 o...

Page 183: ...ifications Electromagnetic compatibility Shipping and storage conditions Mechanical and climatic environment conditions Specifications for insulation tests protection class degree of protection and rated voltage Rated voltages Observing the Design Guidelines SIMATIC products meet the requirements if you observe the design guidelines described in the manual when installing and operating the equipme...

Page 184: ...00 mA short circuit proof Encoder supply 5 2 V 5 2 V 2 max 300 mA short circuit proof Permissible potential difference between the input ground and central grounding busbar of the CPU 1 V DC Auxiliary voltage 2L for the load power supply Reverse polarity protection 24 V DC permissible range 20 4 V to 28 8 V Yes Digital inputs Low level 30 V to 5 V High level 11 V to 30 V Input current typically 9 ...

Page 185: ...kHz Electrical isolation to S7 300 bus No Input frequency and cable length of symmetrical 5 V incremental encoder max 500 kHz at 32 m length of the cable shielded Input frequency and cable length of symmetrical 24 V incremental encoder max 500 kHz at 100 m length of the cable shielded 24 V count inputs Low level 30 V to 5 V High level 11 V to 30 V Input current typically 9 mA Minimum pulse width m...

Page 186: ...Technical data 11 2 Technical data FM 350 1 Counter module 186 Manual 05 2011 A5E03648639 01 ...

Page 187: ...er label 6ES7912 0AA00 0AA0 Front connector 20 pin screw in contacts 6ES7392 1AJ00 0AA0 Front connector 20 pin spring loaded contacts 6ES7392 1BJ00 0AA0 Shield connection element with 2 screw bolts 6ES7390 5AA00 0AA0 Shield connection terminals for 2 cables each with 2 mm to 6 mm shield diameter 1 cable with 3 mm to 8 mm shield diameter 1 cable with 4 mm to 13 mm shield diameter 6ES7390 5AB00 0AA0...

Page 188: ...Replacement parts FM 350 1 Counter module 188 Manual 05 2011 A5E03648639 01 ...

Page 189: ...nt manual No Title 1 SIMATIC S7 300 CPU 31xC and CPU 31x Installation http support automation siemens com WW view en 13008499 2 SIMATIC System and Standard Functions for S7 300 400 http support automation siemens com WW view en 44240604 3 Modifying the System during Operation via CiR Can not be ordered separately Online help and electronic manual as component of STEP 7 ...

Page 190: ...References FM 350 1 Counter module 190 Manual 05 2011 A5E03648639 01 ...

Page 191: ...return two differential pulse sequences with 90 phase shift including a zero mark signal where applicable Encoders with symmetrical output signals These encoders return two differential pulse sequences with 90 phase shift including inverted signals to form a zero mark as required Function FC According to IEC 1131 3 notations this is a code block which does not contain static data A function suppor...

Page 192: ...tor relay circuit Proximity switch A simple BERO switch without directional information The device returns only a single count signal The counter records only the positive edges at signal A The count direction is user specific Pulse duration The pulse duration setting defines the minimum on time of an output Push pull Push pull output of an encoder supplies an active low signal to 0 V ground and a...

Page 193: ...active high signal 24 V STOP STOP as an international term for example as an operating command STOPP STOPP German spelling as a term used in the manual to define an action which is not a command Zero mark The zero mark is positioned on the third track of an incremental encoder It returns a zero mark signal after each rotation Zero mark signal The incremental encoder returns one zero mark signal pe...

Page 194: ...Glossary FM 350 1 Counter module 194 Manual 05 2011 A5E03648639 01 ...

Page 195: ... assignment 78 Checkback interface Count modes 58 Measuring modes 65 Checklist Mechanical installation 76 Coding plug Correct position 21 Command Latch 130 Latch retrigger 127 Measuring times 133 Open and close gate 104 149 Setting the counter 120 Commands 89 139 define 84 Comparison value 10 109 Configuration 20 Connection incremental 24 V encoders 32 incremental 5 V encoders 31 Continuous counti...

Page 196: ...esetting 110 Status 112 155 DIR Meaning 17 Distributed application 12 Double evaluation 167 E ENSET_DN 122 ENSET_UP 122 External errors 176 F FC CNT_CTL1 41 Parameters 43 FC CNT_CTL2 48 FC DIAG_INF 49 FCs Technical data 53 Feedback interface Data exchange 40 FM 350 1 Count modes 86 In the S7 300 structure 18 Measuring modes 134 Overview of commands 89 139 Wiring 25 Frequency measurement 140 Freque...

Page 197: ...riodic measurement mode 146 Pin assignment Front connector 16 Programming without FCs 54 Pulse duration Default value 114 Range of values 114 Q Quadruple evaluation 167 R Restart coordination 72 RPM measurement mode 143 S Safety information 20 Selecting the gate function 91 100 Selecting the Gate Function 95 SET 120 Setting Behavior of the Digital Outputs 109 Setting the counter Via the user progr...

Page 198: ...lues DB parameters for counting 45 DB parameters for measuring 46 Time required with function 45 Time required without function 70 With function 44 Without function 69 U Underflow 103 V Values Readback 71 Version 16 Voltage supply The encoder 28 W Wire end ferrule 32 Z Zero pass 103 ...

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